Commit graph

1751 commits

Author SHA1 Message Date
refractionpcsx2
7101824903 freeze, not free 2018-08-05 21:39:34 +01:00
refractionpcsx2
c33e0df234 Requested changes 2018-08-05 21:28:34 +01:00
refractionpcsx2
8454b0d117 BIOS fix 2018-08-05 19:39:57 +01:00
refractionpcsx2
02c5f3f22c Added MSUBAbc and MAXi VU ops
Applied masking to the VU addresses during reads/writes and branches
Removed some old code from VIF and split the microprogram logs in to VU0/VU1
2018-08-05 18:08:00 +01:00
refractionpcsx2
e169bd8b72 Removed logging line I left in accidentally 2018-08-05 15:38:14 +01:00
refractionpcsx2
aa91303126 Fixed VIF Stall bug I introduced in my previous big commit
Added VIF STOP support
2018-08-05 14:11:04 +01:00
refractionpcsx2
e513585b90 Correct the sizes of VU memory reads 2018-08-05 13:21:29 +01:00
refractionpcsx2
4b18a51c5a Various changes
Properly Added GS Vsync IRQs
Added some VU/VIF memory reads
Added UNPACK functionality according to PS2 Auto Tests
Tidied up a bunch of VU operations and added a CLIP flag pipeline to FMACs
Fixed link addresses on VU branch in branch delay slot
Fixed a chain mode bug in SPR
Altered DMA's so the TADR properly follows MADR in CNT mode, also prepared for DMA Stall addresses on Dest Chain mode
Corrected SIF0 DMA register usage
Added run cycles to VIF for future situations where the CPU may have stalled
Adjusted VIF loop so we don't need double versions of VU waiting and VIF Stalls
2018-08-05 13:00:11 +01:00
PSI-Rockin
abe2ea2327 Reapply old CNT behavior 2018-08-04 23:37:49 -04:00
PSI-Rockin
aa04d65d5c Added VISUB and VMULAq
Also fixed minor CNT bug in DMAC
2018-08-04 21:52:03 -04:00
PSI-Rockin
b3340b4b47 Fixed edge case in IOP DMA - STAT should only be raised if MASK is set
Also fixed divide-by-zero bug
2018-08-04 19:43:07 -04:00
PSI-Rockin
8ef72e065a Fixed compiler errors
Also fixed COP2 and EE timer bugs
2018-08-04 09:24:21 -04:00
PSISP
2e819d0f9c
Merge pull request #74 from ssk97/optimizations
* use ldexp in LOD calculation
precalculate interpolations in render_sprite

* add precision to render_sprite, loop unswitching

* loop unswitching for render_triangle
fix precision on render_sprite
reduce math needed on LOD calculation

* use ints instead of uints, use 16 extra bits of precision instead of 8

* fix Q
2018-08-03 16:48:18 -04:00
ssk97
91f14c6ce5
Update gs.cpp
fix Q
2018-08-03 12:42:18 -07:00
PSI-Rockin
8b22d7138a Added various VU ops
Also fixed some VU disasm bugs
2018-08-02 17:04:27 -04:00
PSISP
342fe3d38a
Merge pull request #73 from refractionpcsx2/master
VU and VIF changes
2018-08-02 16:13:54 -04:00
ssk97
02a33ab46f use ints instead of uints, use 16 extra bits of precision instead of 8 2018-08-01 19:48:49 -07:00
ssk97
d03c80cffb loop unswitching for render_triangle
fix precision on render_sprite
reduce math needed on LOD calculation
2018-08-01 19:20:26 -07:00
ssk97
2c376f9c14 add precision to render_sprite, loop unswitching 2018-08-01 18:58:42 -07:00
ssk97
5abc0ff42a use ldexp in LOD calculation
precalculate interpolations in render_sprite
2018-08-01 18:19:31 -07:00
refractionpcsx2
d981e706a8 VU and VIF changes
Added basic handling of VPU_STAT
Change COP2 to use normal pipelining instead of just flushing
Added VIF UNPACK MODE support
Tweaked VU Execution so it cannot start one while one is already running
Added updating of VU Status register
Added FSAND, MULAq VU OPs
Properly clamped VU results
Added VU stalling for Q based commands and WAITQ gets priority over upper instruction
Fixed bug in LQD VU OP
2018-08-02 00:15:33 +01:00
PSI-Rockin
c6522fe3e0 Added "skipmpeg" hack
This allows us to get rid of the previous hack for Atelier Iris, which is somewhat good as this one is generic.

Why have this hack? FMVs are only a secondary consideration compared to getting the rest of the emulator functional. Once the core emulation is good, we can work on perfecting movie playback.
2018-08-01 19:00:36 -04:00
PSISP
7b7309e539
Merge pull request #72 from refractionpcsx2/master
Some IPU changes and added ERSQRT/RSQRT
2018-07-31 21:20:39 -04:00
PSI-Rockin
08c62bc4c2 Merge branch 'master' of https://github.com/PSI-Rockin/DobieStation 2018-07-31 21:17:58 -04:00
PSI-Rockin
4b0fc478b6 Added PSMCT4 to host-to-host transfers and also ITOF15
Some fixes to (hopefully) get Jak 1 further
2018-07-31 21:17:56 -04:00
refractionpcsx2
8656aaab20 Some IPU changes and added another VU op
IPU changes need work, but this puts us in a better state than we were in
2018-08-01 00:07:25 +01:00
ssk97
ae71a745ac fix LoD calculation (#71)
* round down LoD when very near 0
2018-07-31 18:52:21 -04:00
PSI-Rockin
9fd2e04c32 Hotfix for compiler issues 2018-07-31 18:31:46 -04:00
PSI-Rockin
12b9e4cef8 Merge branch 'master' of https://github.com/PSI-Rockin/DobieStation 2018-07-31 17:34:34 -04:00
PSI-Rockin
2863061fb6 Basic host-to-host reimplementation 2018-07-31 17:34:31 -04:00
ssk97
ff5ba3c265 Tex1 support (magnification filtering only) (#69)
Also fixed disappearing textures in Atelier Iris
2018-07-31 17:21:28 -04:00
PSISP
7534f8b80b
Merge pull request #67 from refractionpcsx2/master
Added lots of new instructions and also VU0 micro mode
2018-07-31 16:43:10 -04:00
refractionpcsx2
8f7db7cb68 Requested changes 2018-07-31 21:41:06 +01:00
refractionpcsx2
24aeba17bc Nothing to see here, move along 2018-07-31 17:31:56 +01:00
refractionpcsx2
bad56c0879 Added new variables to savestates 2018-07-31 17:30:14 +01:00
PSISP
a79d01f284
Merge pull request #68 from tokumeiwokiboushimasu/master
Added -h option to command-line
2018-07-30 22:04:52 -04:00
tokumeiwokiboushimasu
bf5fb5e327
Print the usage
I added -h option.
2018-07-31 09:24:08 +09:00
PSI-Rockin
65478f5ba9 Some adjustments to ADMA...
No clue what the hell's going on here
2018-07-30 19:48:19 -04:00
PSI-Rockin
81b9069a3e Quick hotfix for ELFs/ISOs not given 2018-07-30 18:46:24 -04:00
PSI-Rockin
5786cbaa0a Adjusted timings of AutoDMA transfers
This appears to fix the "SPU" loops that many games suffered from. Some movies are working now
Made some adjustments to command-line options
2018-07-30 18:35:47 -04:00
refractionpcsx2
065ffea3cb Corrected vu_sqrt disassembly 2018-07-30 22:24:09 +01:00
refractionpcsx2
9e92e553d6 Added lots of new instructions
Added PATH3 masking status from VIF
Added PSMCT16S to BITBLTBUF transfers
Added RSQRT and MSUBA to FPU
Added DMA 8/16/32bit reads of VIF0 control
Added VCALLMS/R, BC2, VADDA, VLQI, VLDQ, VSUBA to COP2
Added MSCALF to VIF
Added FMEQ, ITOF15, SUBA to the VUs
Added Branch in Branch Delay Slot handling
Fixed VU0 running
2018-07-30 17:52:32 +01:00
PSISP
767af7e1b2
Merge pull request #65 from ZirconiumX/arg
Improved argument parsing
2018-07-29 17:37:17 -04:00
Dan Ravensloft
5a27a4dd06 Add reference to 20h in README 2018-07-29 22:36:00 +01:00
Dan Ravensloft
bccd5239f0 Arg.h argument parsing 2018-07-29 22:13:13 +01:00
PSI-Rockin
2ff6078380 Reset added VIF variables properly 2018-07-29 12:15:20 -04:00
PSI-Rockin
7be0a27501 Added new VIF variables to savestates
Some code cleanup as well
2018-07-29 12:14:08 -04:00
refractionpcsx2
08c4bb1515 Added remaining VIF Unpacks (#61)
Added remaining VIF Unpacks
Added 16bit writes for some DMA channels
Added small speed up for EE wait loops (up to 40% speed up during loading)
Added VIF Stalling
Added a few VU commands to micro mode
Added some reg lookups for new VIF regs
Added detection for Branch/Jump in Branch/Jump delay slot
Fixed lock up condition in GIF PATH handling
2018-07-29 10:37:33 -04:00
PSISP
0d0e966d77
Merge pull request #62 from tokumeiwokiboushimasu/master
Build fix
2018-07-29 09:04:40 -04:00
tokumeiwokiboushimasu
56fa6bd0bf
Build fix
strncmp needs <cstring>.
2018-07-29 13:05:39 +09:00