mirror of
https://github.com/ShadauxCat/CATSFC.git
synced 2025-04-02 10:41:47 -04:00
d1fe64aef0
Run the opcode as a tail call from the address calculation. This cuts on the needed return instructions. Pass the opcode address as a parameter; this keeps it in a register most of the time and avoids memory stores.
892 lines
18 KiB
C
892 lines
18 KiB
C
/*******************************************************************************
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Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
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(c) Copyright 1996 - 2002 Gary Henderson (gary.henderson@ntlworld.com) and
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Jerremy Koot (jkoot@snes9x.com)
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(c) Copyright 2001 - 2004 John Weidman (jweidman@slip.net)
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(c) Copyright 2002 - 2004 Brad Jorsch (anomie@users.sourceforge.net),
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funkyass (funkyass@spam.shaw.ca),
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Joel Yliluoma (http://iki.fi/bisqwit/)
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Kris Bleakley (codeviolation@hotmail.com),
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Matthew Kendora,
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Nach (n-a-c-h@users.sourceforge.net),
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Peter Bortas (peter@bortas.org) and
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zones (kasumitokoduck@yahoo.com)
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C4 x86 assembler and some C emulation code
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(c) Copyright 2000 - 2003 zsKnight (zsknight@zsnes.com),
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_Demo_ (_demo_@zsnes.com), and Nach
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C4 C++ code
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(c) Copyright 2003 Brad Jorsch
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DSP-1 emulator code
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(c) Copyright 1998 - 2004 Ivar (ivar@snes9x.com), _Demo_, Gary Henderson,
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John Weidman, neviksti (neviksti@hotmail.com),
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Kris Bleakley, Andreas Naive
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DSP-2 emulator code
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(c) Copyright 2003 Kris Bleakley, John Weidman, neviksti, Matthew Kendora, and
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Lord Nightmare (lord_nightmare@users.sourceforge.net
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OBC1 emulator code
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(c) Copyright 2001 - 2004 zsKnight, pagefault (pagefault@zsnes.com) and
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Kris Bleakley
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Ported from x86 assembler to C by sanmaiwashi
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SPC7110 and RTC C++ emulator code
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(c) Copyright 2002 Matthew Kendora with research by
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zsKnight, John Weidman, and Dark Force
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S-DD1 C emulator code
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(c) Copyright 2003 Brad Jorsch with research by
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Andreas Naive and John Weidman
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S-RTC C emulator code
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(c) Copyright 2001 John Weidman
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ST010 C++ emulator code
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(c) Copyright 2003 Feather, Kris Bleakley, John Weidman and Matthew Kendora
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Super FX x86 assembler emulator code
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(c) Copyright 1998 - 2003 zsKnight, _Demo_, and pagefault
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Super FX C emulator code
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(c) Copyright 1997 - 1999 Ivar, Gary Henderson and John Weidman
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SH assembler code partly based on x86 assembler code
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(c) Copyright 2002 - 2004 Marcus Comstedt (marcus@mc.pp.se)
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Specific ports contains the works of other authors. See headers in
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individual files.
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Snes9x homepage: http://www.snes9x.com
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Permission to use, copy, modify and distribute Snes9x in both binary and
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source form, for non-commercial purposes, is hereby granted without fee,
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providing that this license information and copyright notice appear with
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all copies and any derived work.
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This software is provided 'as-is', without any express or implied
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warranty. In no event shall the authors be held liable for any damages
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arising from the use of this software.
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Snes9x is freeware for PERSONAL USE only. Commercial users should
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seek permission of the copyright holders first. Commercial use includes
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charging money for Snes9x or software derived from Snes9x.
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The copyright holders request that bug fixes and improvements to the code
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should be forwarded to them so everyone can benefit from the modifications
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in future versions.
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Super NES and Super Nintendo Entertainment System are trademarks of
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Nintendo Co., Limited and its subsidiary companies.
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*******************************************************************************/
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#ifndef _CPUMACRO_H_
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#define _CPUMACRO_H_
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static void SetZN16 (uint16 Work)
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{
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ICPU._Zero = Work != 0;
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ICPU._Negative = (uint8) (Work >> 8);
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}
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static void SetZN8 (uint8 Work)
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{
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ICPU._Zero = Work;
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ICPU._Negative = Work;
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}
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static void ADC8 (long Addr)
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{
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Work8 = S9xGetByte (Addr);
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if (CheckDecimal ())
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{
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A1 = (Registers.A.W) & 0xF;
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A2 = (Registers.A.W >> 4) & 0xF;
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W1 = Work8 & 0xF;
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W2 = (Work8 >> 4) & 0xF;
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A1 += W1 + CheckCarry();
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if (A1 > 9)
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{
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A1 -= 10;
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A1 &= 0xF;
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A2++;
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}
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A2 += W2;
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if (A2 > 9)
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{
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A2 -= 10;
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A2 &= 0xF;
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SetCarry ();
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}
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else
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{
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ClearCarry ();
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}
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Ans8 = (A2 << 4) | A1;
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if (~(Registers.AL ^ Work8) &
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(Work8 ^ Ans8) & 0x80)
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SetOverflow();
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else
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ClearOverflow();
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Registers.AL = Ans8;
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SetZN8 (Registers.AL);
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}
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else
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{
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Ans16 = Registers.AL + Work8 + CheckCarry();
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ICPU._Carry = Ans16 >= 0x100;
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if (~(Registers.AL ^ Work8) &
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(Work8 ^ (uint8) Ans16) & 0x80)
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SetOverflow();
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else
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ClearOverflow();
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Registers.AL = (uint8) Ans16;
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SetZN8 (Registers.AL);
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}
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}
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static void ADC16 (long Addr)
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{
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Work16 = S9xGetWord (Addr);
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if (CheckDecimal ())
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{
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A1 = (Registers.A.W) & 0xF;
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A2 = (Registers.A.W >> 4) & 0xF;
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A3 = (Registers.A.W >> 8) & 0xF;
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A4 = (Registers.A.W >> 12) & 0xF;
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W1 = Work16 & 0xF;
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W2 = (Work16 >> 4) & 0xF;
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W3 = (Work16 >> 8) & 0xF;
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W4 = (Work16 >> 12) & 0xF;
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A1 += W1 + CheckCarry ();
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if (A1 > 9)
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{
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A1 -= 10;
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A1 &= 0xF;
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A2++;
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}
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A2 += W2;
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if (A2 > 9)
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{
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A2 -= 10;
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A2 &= 0xF;
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A3++;
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}
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A3 += W3;
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if (A3 > 9)
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{
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A3 -= 10;
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A3 &= 0xF;
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A4++;
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}
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A4 += W4;
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if (A4 > 9)
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{
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A4 -= 10;
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A4 &= 0xF;
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SetCarry ();
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}
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else
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{
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ClearCarry ();
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}
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Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1);
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if (~(Registers.A.W ^ Work16) &
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(Work16 ^ Ans16) & 0x8000)
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SetOverflow();
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else
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ClearOverflow();
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Registers.A.W = Ans16;
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SetZN16 (Registers.A.W);
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}
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else
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{
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Ans32 = Registers.A.W + Work16 + CheckCarry();
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ICPU._Carry = Ans32 >= 0x10000;
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if (~(Registers.A.W ^ Work16) &
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(Work16 ^ (uint16) Ans32) & 0x8000)
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SetOverflow();
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else
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ClearOverflow();
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Registers.A.W = (uint16) Ans32;
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SetZN16 (Registers.A.W);
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}
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}
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static void AND16 (long Addr)
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{
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Registers.A.W &= S9xGetWord (Addr);
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SetZN16 (Registers.A.W);
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}
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static void AND8 (long Addr)
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{
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Registers.AL &= S9xGetByte (Addr);
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SetZN8 (Registers.AL);
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}
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static inline void A_ASL16 ()
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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ICPU._Carry = (Registers.AH & 0x80) != 0;
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Registers.A.W <<= 1;
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SetZN16 (Registers.A.W);
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}
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static inline void A_ASL8 ()
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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ICPU._Carry = (Registers.AL & 0x80) != 0;
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Registers.AL <<= 1;
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SetZN8 (Registers.AL);
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}
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static void ASL16 (long Addr)
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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Work16 = S9xGetWord (Addr);
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ICPU._Carry = (Work16 & 0x8000) != 0;
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Work16 <<= 1;
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//S9xSetWord (Work16, Addr);
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S9xSetByte(Work16>>8, Addr+1);
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S9xSetByte(Work16&0xFF, Addr);
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SetZN16 (Work16);
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}
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static void ASL8 (long Addr)
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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Work8 = S9xGetByte (Addr);
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ICPU._Carry = (Work8 & 0x80) != 0;
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Work8 <<= 1;
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S9xSetByte (Work8, Addr);
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SetZN8 (Work8);
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}
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static void BIT16 (long Addr)
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{
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Work16 = S9xGetWord (Addr);
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ICPU._Overflow = (Work16 & 0x4000) != 0;
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ICPU._Negative = (uint8) (Work16 >> 8);
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ICPU._Zero = (Work16 & Registers.A.W) != 0;
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}
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static void BIT8 (long Addr)
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{
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Work8 = S9xGetByte (Addr);
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ICPU._Overflow = (Work8 & 0x40) != 0;
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ICPU._Negative = Work8;
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ICPU._Zero = Work8 & Registers.AL;
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}
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static void CMP16 (long Addr)
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{
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Int32 = (long) Registers.A.W -
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(long) S9xGetWord (Addr);
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ICPU._Carry = Int32 >= 0;
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SetZN16 ((uint16) Int32);
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}
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static void CMP8 (long Addr)
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{
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Int16 = (short) Registers.AL -
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(short) S9xGetByte (Addr);
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ICPU._Carry = Int16 >= 0;
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SetZN8 ((uint8) Int16);
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}
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static void CMX16 (long Addr)
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{
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Int32 = (long) Registers.X.W -
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(long) S9xGetWord (Addr);
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ICPU._Carry = Int32 >= 0;
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SetZN16 ((uint16) Int32);
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}
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static void CMX8 (long Addr)
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{
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Int16 = (short) Registers.XL -
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(short) S9xGetByte (Addr);
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ICPU._Carry = Int16 >= 0;
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SetZN8 ((uint8) Int16);
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}
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static void CMY16 (long Addr)
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{
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Int32 = (long) Registers.Y.W -
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(long) S9xGetWord (Addr);
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ICPU._Carry = Int32 >= 0;
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SetZN16 ((uint16) Int32);
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}
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static void CMY8 (long Addr)
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{
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Int16 = (short) Registers.YL -
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(short) S9xGetByte (Addr);
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ICPU._Carry = Int16 >= 0;
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SetZN8 ((uint8) Int16);
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}
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static inline void A_DEC16 ()
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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#ifdef CPU_SHUTDOWN
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CPU.WaitAddress = NULL;
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#endif
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Registers.A.W--;
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SetZN16 (Registers.A.W);
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}
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static inline void A_DEC8 ()
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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#ifdef CPU_SHUTDOWN
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CPU.WaitAddress = NULL;
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#endif
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Registers.AL--;
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SetZN8 (Registers.AL);
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}
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static void DEC16 (long Addr)
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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#ifdef CPU_SHUTDOWN
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CPU.WaitAddress = NULL;
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#endif
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Work16 = S9xGetWord (Addr) - 1;
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//S9xSetWord (Work16, Addr);
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S9xSetByte (Work16>>8, Addr+1);
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S9xSetByte (Work16&0xFF, Addr);
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SetZN16 (Work16);
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}
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static void DEC8 (long Addr)
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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#ifdef CPU_SHUTDOWN
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CPU.WaitAddress = NULL;
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#endif
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Work8 = S9xGetByte (Addr) - 1;
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S9xSetByte (Work8, Addr);
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SetZN8 (Work8);
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}
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static void EOR16 (long Addr)
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{
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Registers.A.W ^= S9xGetWord (Addr);
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SetZN16 (Registers.A.W);
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}
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static void EOR8 (long Addr)
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{
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Registers.AL ^= S9xGetByte (Addr);
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SetZN8 (Registers.AL);
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}
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static inline void A_INC16 ()
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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#ifdef CPU_SHUTDOWN
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CPU.WaitAddress = NULL;
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#endif
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Registers.A.W++;
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SetZN16 (Registers.A.W);
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}
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static inline void A_INC8 ()
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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#ifdef CPU_SHUTDOWN
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CPU.WaitAddress = NULL;
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#endif
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Registers.AL++;
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SetZN8 (Registers.AL);
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}
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static void INC16 (long Addr)
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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#ifdef CPU_SHUTDOWN
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CPU.WaitAddress = NULL;
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#endif
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Work16 = S9xGetWord (Addr) + 1;
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//S9xSetWord (Work16, Addr);
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S9xSetByte (Work16>>8, Addr+1);
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S9xSetByte (Work16&0xFF, Addr);
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SetZN16 (Work16);
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}
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static void INC8 (long Addr)
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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#ifdef CPU_SHUTDOWN
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CPU.WaitAddress = NULL;
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#endif
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Work8 = S9xGetByte (Addr) + 1;
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S9xSetByte (Work8, Addr);
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SetZN8 (Work8);
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}
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static void LDA16 (long Addr)
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{
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Registers.A.W = S9xGetWord (Addr);
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SetZN16 (Registers.A.W);
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}
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static void LDA8 (long Addr)
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{
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Registers.AL = S9xGetByte (Addr);
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SetZN8 (Registers.AL);
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}
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static void LDX16 (long Addr)
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{
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Registers.X.W = S9xGetWord (Addr);
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SetZN16 (Registers.X.W);
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}
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static void LDX8 (long Addr)
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{
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Registers.XL = S9xGetByte (Addr);
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SetZN8 (Registers.XL);
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}
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static void LDY16 (long Addr)
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{
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Registers.Y.W = S9xGetWord (Addr);
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SetZN16 (Registers.Y.W);
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}
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static void LDY8 (long Addr)
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{
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Registers.YL = S9xGetByte (Addr);
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SetZN8 (Registers.YL);
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}
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static inline void A_LSR16 ()
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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ICPU._Carry = Registers.AL & 1;
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Registers.A.W >>= 1;
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SetZN16 (Registers.A.W);
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}
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static inline void A_LSR8 ()
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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ICPU._Carry = Registers.AL & 1;
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Registers.AL >>= 1;
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SetZN8 (Registers.AL);
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}
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static void LSR16 (long Addr)
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
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Work16 = S9xGetWord (Addr);
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ICPU._Carry = Work16 & 1;
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Work16 >>= 1;
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//S9xSetWord (Work16, Addr);
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S9xSetByte (Work16>>8, Addr+1);
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S9xSetByte (Work16&0xFF, Addr);
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SetZN16 (Work16);
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}
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static void LSR8 (long Addr)
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{
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#ifndef SA1_OPCODES
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CPU.Cycles += ONE_CYCLE;
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#endif
|
|
Work8 = S9xGetByte (Addr);
|
|
ICPU._Carry = Work8 & 1;
|
|
Work8 >>= 1;
|
|
S9xSetByte (Work8, Addr);
|
|
SetZN8 (Work8);
|
|
}
|
|
|
|
static void ORA16 (long Addr)
|
|
{
|
|
Registers.A.W |= S9xGetWord (Addr);
|
|
SetZN16 (Registers.A.W);
|
|
}
|
|
|
|
static void ORA8 (long Addr)
|
|
{
|
|
Registers.AL |= S9xGetByte (Addr);
|
|
SetZN8 (Registers.AL);
|
|
}
|
|
|
|
static inline void A_ROL16 ()
|
|
{
|
|
#ifndef SA1_OPCODES
|
|
CPU.Cycles += ONE_CYCLE;
|
|
#endif
|
|
Work32 = (Registers.A.W << 1) | CheckCarry();
|
|
ICPU._Carry = Work32 >= 0x10000;
|
|
Registers.A.W = (uint16) Work32;
|
|
SetZN16 ((uint16) Work32);
|
|
}
|
|
|
|
static inline void A_ROL8 ()
|
|
{
|
|
#ifndef SA1_OPCODES
|
|
CPU.Cycles += ONE_CYCLE;
|
|
#endif
|
|
Work16 = Registers.AL;
|
|
Work16 <<= 1;
|
|
Work16 |= CheckCarry();
|
|
ICPU._Carry = Work16 >= 0x100;
|
|
Registers.AL = (uint8) Work16;
|
|
SetZN8 ((uint8) Work16);
|
|
}
|
|
|
|
static void ROL16 (long Addr)
|
|
{
|
|
#ifndef SA1_OPCODES
|
|
CPU.Cycles += ONE_CYCLE;
|
|
#endif
|
|
Work32 = S9xGetWord (Addr);
|
|
Work32 <<= 1;
|
|
Work32 |= CheckCarry();
|
|
ICPU._Carry = Work32 >= 0x10000;
|
|
//S9xSetWord ((uint16) Work32, Addr);
|
|
S9xSetByte((Work32>>8)&0xFF, Addr+1);
|
|
S9xSetByte(Work32&0xFF, Addr);
|
|
SetZN16 ((uint16) Work32);
|
|
}
|
|
|
|
static void ROL8 (long Addr)
|
|
{
|
|
#ifndef SA1_OPCODES
|
|
CPU.Cycles += ONE_CYCLE;
|
|
#endif
|
|
Work16 = S9xGetByte (Addr);
|
|
Work16 <<= 1;
|
|
Work16 |= CheckCarry ();
|
|
ICPU._Carry = Work16 >= 0x100;
|
|
S9xSetByte ((uint8) Work16, Addr);
|
|
SetZN8 ((uint8) Work16);
|
|
}
|
|
|
|
static inline void A_ROR16 ()
|
|
{
|
|
#ifndef SA1_OPCODES
|
|
CPU.Cycles += ONE_CYCLE;
|
|
#endif
|
|
Work32 = Registers.A.W;
|
|
Work32 |= (int) CheckCarry() << 16;
|
|
ICPU._Carry = (uint8) (Work32 & 1);
|
|
Work32 >>= 1;
|
|
Registers.A.W = (uint16) Work32;
|
|
SetZN16 ((uint16) Work32);
|
|
}
|
|
|
|
static inline void A_ROR8 ()
|
|
{
|
|
#ifndef SA1_OPCODES
|
|
CPU.Cycles += ONE_CYCLE;
|
|
#endif
|
|
Work16 = Registers.AL | ((uint16) CheckCarry() << 8);
|
|
ICPU._Carry = (uint8) Work16 & 1;
|
|
Work16 >>= 1;
|
|
Registers.AL = (uint8) Work16;
|
|
SetZN8 ((uint8) Work16);
|
|
}
|
|
|
|
static void ROR16 (long Addr)
|
|
{
|
|
#ifndef SA1_OPCODES
|
|
CPU.Cycles += ONE_CYCLE;
|
|
#endif
|
|
Work32 = S9xGetWord (Addr);
|
|
Work32 |= (int) CheckCarry() << 16;
|
|
ICPU._Carry = (uint8) (Work32 & 1);
|
|
Work32 >>= 1;
|
|
//S9xSetWord ((uint16) Work32, Addr);
|
|
S9xSetByte ( (Work32>>8)&0x00FF, Addr+1);
|
|
S9xSetByte (Work32&0x00FF, Addr);
|
|
SetZN16 ((uint16) Work32);
|
|
}
|
|
|
|
static void ROR8 (long Addr)
|
|
{
|
|
#ifndef SA1_OPCODES
|
|
CPU.Cycles += ONE_CYCLE;
|
|
#endif
|
|
Work16 = S9xGetByte (Addr);
|
|
Work16 |= (int) CheckCarry () << 8;
|
|
ICPU._Carry = (uint8) (Work16 & 1);
|
|
Work16 >>= 1;
|
|
S9xSetByte ((uint8) Work16, Addr);
|
|
SetZN8 ((uint8) Work16);
|
|
}
|
|
|
|
static void SBC16 (long Addr)
|
|
{
|
|
Work16 = S9xGetWord (Addr);
|
|
|
|
if (CheckDecimal ())
|
|
{
|
|
A1 = (Registers.A.W) & 0xF;
|
|
A2 = (Registers.A.W >> 4) & 0xF;
|
|
A3 = (Registers.A.W >> 8) & 0xF;
|
|
A4 = (Registers.A.W >> 12) & 0xF;
|
|
W1 = Work16 & 0xF;
|
|
W2 = (Work16 >> 4) & 0xF;
|
|
W3 = (Work16 >> 8) & 0xF;
|
|
W4 = (Work16 >> 12) & 0xF;
|
|
|
|
A1 -= W1 + !CheckCarry ();
|
|
A2 -= W2;
|
|
A3 -= W3;
|
|
A4 -= W4;
|
|
if (A1 > 9)
|
|
{
|
|
A1 += 10;
|
|
A2--;
|
|
}
|
|
if (A2 > 9)
|
|
{
|
|
A2 += 10;
|
|
A3--;
|
|
}
|
|
if (A3 > 9)
|
|
{
|
|
A3 += 10;
|
|
A4--;
|
|
}
|
|
if (A4 > 9)
|
|
{
|
|
A4 += 10;
|
|
ClearCarry ();
|
|
}
|
|
else
|
|
{
|
|
SetCarry ();
|
|
}
|
|
|
|
Ans16 = (A4 << 12) | (A3 << 8) | (A2 << 4) | (A1);
|
|
if ((Registers.A.W ^ Work16) &
|
|
(Registers.A.W ^ Ans16) & 0x8000)
|
|
SetOverflow();
|
|
else
|
|
ClearOverflow();
|
|
Registers.A.W = Ans16;
|
|
SetZN16 (Registers.A.W);
|
|
}
|
|
else
|
|
{
|
|
|
|
Int32 = (long) Registers.A.W - (long) Work16 + (long) CheckCarry() - 1;
|
|
|
|
ICPU._Carry = Int32 >= 0;
|
|
|
|
if ((Registers.A.W ^ Work16) &
|
|
(Registers.A.W ^ (uint16) Int32) & 0x8000)
|
|
SetOverflow();
|
|
else
|
|
ClearOverflow ();
|
|
Registers.A.W = (uint16) Int32;
|
|
SetZN16 (Registers.A.W);
|
|
}
|
|
}
|
|
|
|
static void SBC8 (long Addr)
|
|
{
|
|
Work8 = S9xGetByte (Addr);
|
|
if (CheckDecimal ())
|
|
{
|
|
A1 = (Registers.A.W) & 0xF;
|
|
A2 = (Registers.A.W >> 4) & 0xF;
|
|
W1 = Work8 & 0xF;
|
|
W2 = (Work8 >> 4) & 0xF;
|
|
|
|
A1 -= W1 + !CheckCarry ();
|
|
A2 -= W2;
|
|
if (A1 > 9)
|
|
{
|
|
A1 += 10;
|
|
A2--;
|
|
}
|
|
if (A2 > 9)
|
|
{
|
|
A2 += 10;
|
|
ClearCarry ();
|
|
}
|
|
else
|
|
{
|
|
SetCarry ();
|
|
}
|
|
|
|
Ans8 = (A2 << 4) | A1;
|
|
if ((Registers.AL ^ Work8) &
|
|
(Registers.AL ^ Ans8) & 0x80)
|
|
SetOverflow ();
|
|
else
|
|
ClearOverflow ();
|
|
Registers.AL = Ans8;
|
|
SetZN8 (Registers.AL);
|
|
}
|
|
else
|
|
{
|
|
Int16 = (short) Registers.AL - (short) Work8 + (short) CheckCarry() - 1;
|
|
|
|
ICPU._Carry = Int16 >= 0;
|
|
if ((Registers.AL ^ Work8) &
|
|
(Registers.AL ^ (uint8) Int16) & 0x80)
|
|
SetOverflow ();
|
|
else
|
|
ClearOverflow ();
|
|
Registers.AL = (uint8) Int16;
|
|
SetZN8 (Registers.AL);
|
|
}
|
|
}
|
|
|
|
static void STA16 (long Addr)
|
|
{
|
|
S9xSetWord (Registers.A.W, Addr);
|
|
}
|
|
|
|
static void STA8 (long Addr)
|
|
{
|
|
S9xSetByte (Registers.AL, Addr);
|
|
}
|
|
|
|
static void STX16 (long Addr)
|
|
{
|
|
S9xSetWord (Registers.X.W, Addr);
|
|
}
|
|
|
|
static void STX8 (long Addr)
|
|
{
|
|
S9xSetByte (Registers.XL, Addr);
|
|
}
|
|
|
|
static void STY16 (long Addr)
|
|
{
|
|
S9xSetWord (Registers.Y.W, Addr);
|
|
}
|
|
|
|
static void STY8 (long Addr)
|
|
{
|
|
S9xSetByte (Registers.YL, Addr);
|
|
}
|
|
|
|
static void STZ16 (long Addr)
|
|
{
|
|
S9xSetWord (0, Addr);
|
|
}
|
|
|
|
static void STZ8 (long Addr)
|
|
{
|
|
S9xSetByte (0, Addr);
|
|
}
|
|
|
|
static void TSB16 (long Addr)
|
|
{
|
|
#ifndef SA1_OPCODES
|
|
CPU.Cycles += ONE_CYCLE;
|
|
#endif
|
|
Work16 = S9xGetWord (Addr);
|
|
ICPU._Zero = (Work16 & Registers.A.W) != 0;
|
|
Work16 |= Registers.A.W;
|
|
//S9xSetWord (Work16, Addr);
|
|
S9xSetByte (Work16>>8, Addr+1);
|
|
S9xSetByte (Work16&0xFF, Addr);
|
|
}
|
|
|
|
static void TSB8 (long Addr)
|
|
{
|
|
#ifndef SA1_OPCODES
|
|
CPU.Cycles += ONE_CYCLE;
|
|
#endif
|
|
Work8 = S9xGetByte (Addr);
|
|
ICPU._Zero = Work8 & Registers.AL;
|
|
Work8 |= Registers.AL;
|
|
S9xSetByte (Work8, Addr);
|
|
}
|
|
|
|
static void TRB16 (long Addr)
|
|
{
|
|
#ifndef SA1_OPCODES
|
|
CPU.Cycles += ONE_CYCLE;
|
|
#endif
|
|
Work16 = S9xGetWord (Addr);
|
|
ICPU._Zero = (Work16 & Registers.A.W) != 0;
|
|
Work16 &= ~Registers.A.W;
|
|
//S9xSetWord (Work16, Addr);
|
|
S9xSetByte (Work16>>8, Addr+1);
|
|
S9xSetByte (Work16&0xFF, Addr);
|
|
}
|
|
|
|
static void TRB8 (long Addr)
|
|
{
|
|
#ifndef SA1_OPCODES
|
|
CPU.Cycles += ONE_CYCLE;
|
|
#endif
|
|
Work8 = S9xGetByte (Addr);
|
|
ICPU._Zero = Work8 & Registers.AL;
|
|
Work8 &= ~Registers.AL;
|
|
S9xSetByte (Work8, Addr);
|
|
}
|
|
#endif
|
|
|