CATSFC/system/gui/uicolors.txt

@@ -1,6 +0,0 @@
-Background:   #000000
-InactiveItem: #461F99
-ActiveItem:   #FFFFFF
-MessageText:  #461F99
-InactiveMain: #FFFFFF
-ActiveMain:   #FFFFFF

Makefile

@@ -7,14 +7,12 @@ FS_DIR       = $(DS2SDKPATH)/libsrc/fs
 CONSOLE_DIR  = $(DS2SDKPATH)/libsrc/console
 KEY_DIR      = $(DS2SDKPATH)/libsrc/key
 ZLIB_DIR     = $(DS2SDKPATH)/libsrc/zlib
-CORE_DIR     = $(DS2SDKPATH)/libsrc/core
 
 LIBS        := $(DS2SDKPATH)/lib/libds2b.a -lc -lm -lgcc
 EXTLIBS     := $(DS2SDKPATH)/lib/libds2a.a
 
 INCLUDE     := -Isource -Isource/unzip -Isource/nds -I$(DS2SDKPATH)/include \
-               -I$(FS_DIR) -I$(CONSOLE_DIR) -I$(KEY_DIR) -I$(ZLIB_DIR) \
+               -I$(FS_DIR) -I$(CONSOLE_DIR) -I$(KEY_DIR) -I$(ZLIB_DIR)
-               -I$(CORE_DIR)
 
 LINK_SPEC   := $(DS2SDKPATH)/specs/link.xn
 START_ASM   := $(DS2SDKPATH)/specs/start.S
@@ -37,7 +35,7 @@ C_SOURCES   = source/unzip/explode.c source/unzip/unreduce.c \
               source/unzip/unshrink.c source/unzip/unzip.c \
               source/nds/bdf_font.c source/nds/bitmap.c \
               source/nds/draw.c source/nds/ds2_main.c source/nds/gcheat.c \
-              source/nds/gui.c source/nds/dma_adj.c source/nds/cheatgrp.c
+              source/nds/gui.c source/nds/dma_adj.c
 CPP_SOURCES = source/apu.cpp source/apudebug.cpp source/c4.cpp \
               source/c4emu.cpp source/cheats2.cpp source/cheats.cpp \
               source/clip.cpp source/cpu.cpp source/cpuexec.cpp \

README.md

@@ -1,4 +1,4 @@
-CATSFC version 1.36, 2013-06-16
+CATSFC version 1.28, 2013-02-04
 
 A Super Nintendo emulator for the Supercard DSTWO.
 
@@ -7,22 +7,55 @@ Based on:
   zsKnight, etc.)
 * NDSSFC 1.06, by the Supercard team (porting to the MIPS processor)
 * BAGSFC, by BassAceGold (improving over NDSSFC)
-* CATSFC, by ShadauxCat and Nebuleon (improving over BAGSFC)
+* CATSFC, by ShadauxCat (improving over BAGSFC)
 
-Contains:
+# Compiling
-* Language files written by the GBAtemp community: Dutch by Aeter, French
+
-  by Nebuleon, German by SignZ, Portuguese (Brazilian) by Diego Liberal,
+(If you downloaded the plugin ready-made, you can safely skip this section.
-  Spanish by Boriar
+ In this case, go to `# Installing`.)
-* Language files written by GitHub users: Italian by alexinfurs
+
+Compiling CATSFC is best done on Linux. Make sure you have access to a Linux
+system to perform these steps.
+
+## The DS2 SDK
+To compile CATSFC, you need to have the Supercard team's DS2 SDK.
+The Makefile expects it at `/opt/ds2sdk`, but you can move it anywhere,
+provided that you update the Makefile's `DS2SDKPATH` variable to point to it.
+
+For best results, download version 0.13 of the DS2 SDK, which will have the
+MIPS compiler (`gcc`), extract it to `/opt/ds2sdk`, follow the instructions,
+then download version 1.2 of the DS2 SDK and extract its files into
+`opt/ds2sdk`, overwriting version 0.13.
+
+Additionally, you will need to add the updated `zlib`, DMA
+(Direct Memory Access) and filesystem access routines provided by BassAceGold
+and recompile `libds2a.a`. To do this:
+
+> sudo rm -r /opt/ds2sdk/libsrc/{console,dma,fs,key,zlib,Makefile} /opt/ds2sdk/include
+> sudo cp -r sdk-modifications/{libsrc,include} /opt/ds2sdk
+> sudo chmod -R 600 /opt/ds2sdk/{libsrc,include}
+> sudo chmod -R a+rX /opt/ds2sdk/{libsrc,include}
+> cd /opt/ds2sdk/libsrc
+> sudo rm libds2a.a ../lib/libds2a.a
+> sudo make
+
+## The MIPS compiler (`gcc`)
+You also need the MIPS compiler from the DS2 SDK.
+The Makefile expects it at `/opt/mipsel-4.1.2-nopic`, but you can move it
+anywhere, provided that you update the Makefile's `CROSS` variable to point to
+it.
+
+## Making the plugin
+To make the plugin, `catsfc.plg`, use the `cd` command to change to the
+directory containing your copy of the CATSFC source, then type
+`make clean; make`. `catsfc.plg` should appear in the same directory.
 
 # Installing
 
-(If you got the source code and want to compile it, see the `Compiling` section
+To install the plugin to your storage card after compiling it, copy
- at the end of the file.)
+`catsfc.plg`, `catsfc.ini` and `catsfc.bmp` to the card's `_dstwoplug`
-
+directory. Then, copy the source directory's CATSFC subdirectory to the
-To install the plugin to your storage card, copy `catsfc.plg`, `catsfc.ini` and
+root of the card.
-`catsfc.bmp` from the release archive to the card's `_dstwoplug` directory.
-Then, copy the `CATSFC` subdirectory to the root of the card.
 
 # Cheats
 
@@ -35,9 +68,14 @@ old format used in Mightymo's BSNES Cheat Code Pack.
    the operating system on your computer.
 3. In the zip file, open the folder called *BSNES Cheat Code Pack*, then
    the one called *BSNES v0.51-0.74 Cheat Code Pack*.
-4. Open your storage card's CATSFC folder, then descend into gamecht.
+4. Open your microSD card's CATSFC folder, then descend into gamecht.
 5. Drag the cheat code files from the zip archive to the card's gamecht
    folder.
+6. In the card's gamecht directory, create two folders. Name the first one
+   *a-m* and the second one *n-z*. Drag the cheat files from the games whose
+   name starts with A to M into *a-m* and the rest into *n-z*.
+
+This is because the directory display does not handle more than 512 files.
 
 To add cheats to the menu in a game, first load the game, then use the Cheats
 menu's "Load a cheat file" option.
@@ -46,24 +84,19 @@ menu's "Load a cheat file" option.
 
 In the Video & audio menu, the **Frame skipping** option allows you to select
 a number of frames to skip between rendered frames.
-
+* Setting this to 0 will show every single frame, but this will slow down the
-As of version 1.29, the default is - (Keep up with the game). For most games,
+  game considerably, as the DSTWO would only have enough processing power to
-this setting keeps video and audio fluid, without the sudden slowdowns of
+  emulate **and** render a few frames per second. It has enough power to
-previous versions when many sprites fill the screen. The DS controller buttons
+  emulate all frames and render **some**, though.
-are also responsive at this setting.
-
-For some games, you may need to adjust frame skipping.
-* If a game runs at 5 frames per second, like *Yoshi's Island*,
-  *Kirby Super Star*, *Star Fox* or *Super Mario RPG*, setting frame skipping
-  to 1 will allow you to jump, move or shoot at the right times.
-* If you want to show more frames per second in a game that already shows 20,
-  setting frame skipping to 1 or 0 will cause more frames to appear,
-  but your DS button input may stop responding for 2 entire seconds every so
-  often. The audio may also be stretched. (This is similar to NDSGBA.)
 * Setting this to 10 will skip 10 frames and render one, but this will
   severely desynchronise the audio. You will also find yourself unable to
-  perform actions during the correct frame with the DS buttons. It is advised
+  perform actions during the correct frame with the controller.
-  to set frame skipping to the lowest value with which you can play a game.
+* Setting this to - (Keep up with the game) will make the emulator try to
+  render the game at its correct speed, dropping frames as needed (up to 8).
+
+It is recommended to start with frame skipping 4 (Show 1 frame every 5) and
+go to 3 or 2 if the game doesn't run with major slowdowns with them. If you
+don't like the slowdowns, return to frame skipping 4 or -.
 
 # Fluidity
 
@@ -72,13 +105,12 @@ By default, video fluidity is preferred over audio fluidity in games.
 
 * Preferring video fluidity makes audio skip certain notes, up to
   23 milliseconds, in order to render more video. In many games, this
-  difference is not audible, but you may hear certain audio glitches if a game
+  difference is not audible.
-  depends highly on timing for its audio.
+  Use this option if you want to play games that require precise controls or
-  Use this option if you want to play games that require fluid imagery more
+  fluid imagery more than precise audio emulation. You can also use this option
-  than precise audio emulation. You can also use this option when watching game
+  when watching game introductions, endings and cutscenes.
-  introductions, endings and cutscenes.
 * Preferring audio fluidity makes video skip certain images, up to
-  46 milliseconds, in order to render audio closer to 32,000 times per second.
+  166 milliseconds, in order to render audio closer to 32,000 times per second.
   Use this option if you want to play games mainly for their soundtracks, or in
   a game's sound test mode. You can also use this option to experiment with the
   green berry glitch in Super Mario World that makes TIME go over and under 100
@@ -105,18 +137,10 @@ Available actions are:
   will be forced on.
 * Toggle sound. Each time this hotkey is held, the sound will be disabled if
   it's currently enabled, and vice-versa.
-* Save state #1. Each time this hotkey is held, saved state #1 will be written,
-  without confirmation if it exists.
-* Load state #1. Each time this hotkey is held, saved state #1 will be loaded.
-* Toggle full-screen. Each time this hotkey is held:
-  * If the current display mode *is* a full-screen mode, then the display mode
-    is set to 3 (Middle, square pixels) and the top and bottom will be cut off.
-  * If the current display mode *is not* a full-screen mode, then the display
-    mode is set to 4 (Entire screen, smoothed).
 
 # The font
 
-The font used by CATSFC is similar to the Pictochat font. To modify it,
+The font used by CATSFC is now similar to the Pictochat font. To modify it,
 see `source/font/README.txt`.
 
 # Translations
@@ -128,87 +152,40 @@ need to do the following:
 * Open `CATSFC/system/language.msg`.
 * Copy what's between `STARTENGLISH` and `ENDENGLISH` and paste it at the end
   of the file.
-* Change the tags. For example, if you want to translate to Japanese, the tags
+* Change the tags. For example, if you want to translate to German, the tags
-  will become `STARTJAPANESE` and `ENDJAPANESE`.
+  will become `STARTGERMAN` and `ENDGERMAN`.
 * Translate each of the messages, using the lines starting with `#MSG_` as a
   guide to the context in which the messages will be used.
-
-If you are not comfortable editing C code, or cannot compile CATSFC after your
-changes, you may instead test your translation in the English block and submit
-it. That allows you to look for message length issues and to align the option
-names and values to your liking with spaces.
-
-If you wish to also hook your language into the user interface, you will need
-to do the following:
-
 * Edit `source/nds/message.h`. Find `enum LANGUAGE` and add the name of your
-  language there. For the example of Japanese, you would add this at the end of
+  language there. For the example of German, you would add this at the end of
   the list:
   ```
 	,
-	JAPANESE
+	GERMAN
   ```
 * Still in `source/nds/message.h`, just below `enum LANGUAGE`, you will find
   `extern char* lang[` *some number* `]`. Add 1 to that number.
 * Edit `source/nds/gui.c`. Find `char *lang[` *some number* `] =`.
   Add the name of your language, in the language itself. For the example of
-  Japanese, you would add this at the end of the list:
+  German, you would add this at the end of the list:
   ```
 	,
-	"日本語"
+	"Deutsch"
   ```
 * Still in `source/nds/gui.c`, find `char* language_options[]`, which is below
   the language names. Add an entry similar to the others, with the last number
-  plus 1. For example, if the last entry is `, (char *) &lang[7]`, yours would
+  plus 1. For example, if the last entry is `, (char *) &lang[2]`, yours would
-  be `, (char *) &lang[8]`.
+  be `, (char *) &lang[3]`.
 * Still in `source/nds/gui.c`, find `case CHINESE_SIMPLIFIED`. Copy the lines
   starting at the `case` and ending with `break`, inclusively. Paste them
   before the `}`. Change the language name and tags. For the example of
-  Japanese, you would use:
+  German, you would use:
   ```
-	case JAPANESE:
+	case GERMAN:
-		strcpy(start, "STARTJAPANESE");
+		strcpy(start, "STARTGERMAN");
-		strcpy(end, "ENDJAPANESE");
+		strcpy(end, "ENDGERMAN");
 		break;
   ```
 
 Compile again, copy the plugin and your new `language.msg` to your card
 under `CATSFC/system`, and you can now select your new language in CATSFC!
-
-# Compiling
-
-Compiling CATSFC is best done on Linux. Make sure you have access to a Linux
-system to perform these steps.
-
-## The DS2 SDK
-To compile CATSFC, you need to have the Supercard team's DS2 SDK.
-The Makefile expects it at `/opt/ds2sdk`, but you can move it anywhere,
-provided that you update the Makefile's `DS2SDKPATH` variable to point to it.
-
-For best results, download version 0.13 of the DS2 SDK, which will have the
-MIPS compiler (`gcc`), extract it to `/opt/ds2sdk`, follow the instructions,
-then download version 1.2 of the DS2 SDK and extract its files into
-`opt/ds2sdk`, overwriting version 0.13.
-
-Additionally, you will need to add the updated `zlib`, DMA
-(Direct Memory Access) and filesystem access routines provided by BassAceGold
-and recompile `libds2a.a`. To do this:
-
-> sudo rm -r /opt/ds2sdk/libsrc/{console,core,fs,key,zlib,Makefile} /opt/ds2sdk/include
-> sudo cp -r sdk-modifications/{libsrc,include} /opt/ds2sdk
-> sudo chmod -R 600 /opt/ds2sdk/{libsrc,include}
-> sudo chmod -R a+rX /opt/ds2sdk/{libsrc,include}
-> cd /opt/ds2sdk/libsrc
-> sudo rm libds2a.a ../lib/libds2a.a
-> sudo make
-
-## The MIPS compiler (`gcc`)
-You also need the MIPS compiler from the DS2 SDK.
-The Makefile expects it at `/opt/mipsel-4.1.2-nopic`, but you can move it
-anywhere, provided that you update the Makefile's `CROSS` variable to point to
-it.
-
-## Making the plugin
-To make the plugin, `catsfc.plg`, use the `cd` command to change to the
-directory containing your copy of the CATSFC source, then type
-`make clean; make`. `catsfc.plg` should appear in the same directory.

sdk-modifications/include/ds2_cpuclock.h

@@ -13,6 +13,7 @@ extern int ds2_setCPULevel(unsigned int level);
 extern void ds2_udelay(unsigned int usec);
 extern void ds2_mdelay(unsigned int msec);
 
+//#define ds2_setCPUclocklevel ds2_setCPULevel
 
 #ifdef __cplusplus
 }

sdk-modifications/include/ds2_dma.h

@@ -1,138 +1,50 @@
-#ifndef _DS2_DMA_H__
+#ifndef __DMA_H__
-#define _DS2_DMA_H__
+#define __DMA_H__
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+//register a DMA transfer request
+//ch: channel id request, there are 6 channles, 
+//irq_handler: the DMA interruption handle
+//arg: argument to the handle
+//mode: DMA mode, such as port width, address increased/fixed, and so on
+//type: DMA request type
+extern int dma_request(int ch, void (*irq_handler)(unsigned int), unsigned int arg,
+		 unsigned int mode, unsigned int type);
 
-#define MAX_DMA_NUM 6  /* max 6 channels */
+//start DMA transfer, must request a DMA first
+//ch: channel id
+//srcAddr: DMA source address
+//dstAddr: DMA destination address
+//count: DMA transfer count, the total bytes due the mode in dma_request
+extern void dma_start(int ch, unsigned int srcAddr, unsigned int dstAddr,
+	       unsigned int count);
 
+//Stop DMA transfer
+extern void dma_stop(int ch);
 
-// DMA request source register
+//Wait DMA transfer over
-#define DMAC_DRSR_RS_BIT    0
+extern int dma_wait_finish(int ch);
-#define DMAC_DRSR_RS_AUTO (8 << DMAC_DRSR_RS_BIT)
 
 
-// DMA channel command register
-#define DMAC_DCMD_SAI       (1 << 23) /* source address increment */
-#define DMAC_DCMD_DAI       (1 << 22) /* dest address increment */
-
-#define DMAC_DCMD_SWDH_BIT  14  /* source port width */
-#define DMAC_DCMD_SWDH_32 (0 << DMAC_DCMD_SWDH_BIT)
-#define DMAC_DCMD_SWDH_8  (1 << DMAC_DCMD_SWDH_BIT)
-#define DMAC_DCMD_SWDH_16 (2 << DMAC_DCMD_SWDH_BIT)
-
-#define DMAC_DCMD_DWDH_BIT  12  /* dest port width */
-#define DMAC_DCMD_DWDH_32 (0 << DMAC_DCMD_DWDH_BIT)
-#define DMAC_DCMD_DWDH_8  (1 << DMAC_DCMD_DWDH_BIT)
- #define DMAC_DCMD_DWDH_16 (2 << DMAC_DCMD_DWDH_BIT)
-
-#define DMAC_DCMD_DS_BIT    8  /* transfer data size of a data unit */
-#define DMAC_DCMD_DS_32BIT    (0 << DMAC_DCMD_DS_BIT)
-#define DMAC_DCMD_DS_8BIT (1 << DMAC_DCMD_DS_BIT)
-#define DMAC_DCMD_DS_16BIT    (2 << DMAC_DCMD_DS_BIT)
-#define DMAC_DCMD_DS_16BYTE   (3 << DMAC_DCMD_DS_BIT)
-#define DMAC_DCMD_DS_32BYTE   (4 << DMAC_DCMD_DS_BIT)
-
-#define DMAC_DCMD_TM        (1 << 7)  /* transfer mode: 0-single 1-block */
-
-
-//detect if channel has completed job
-#define DMAC_DCCSR_TT   (1 << 3)  /* transfer terminated */
-#define DMAC_BASE 0xB3020000
-#define REG32(addr) *((volatile u32 *)(addr))
-#define DMAC_DCCSR(n) (DMAC_BASE + (0x10 + (n) * 0x20)) /* DMA control/status */
-#define REG_DMAC_DCCSR(n) REG32(DMAC_DCCSR((n)))
-
-#define ds2_DMA_isBusy(n) \
-  !(  REG_DMAC_DCCSR((n)) & DMAC_DCCSR_TT )
-
-
-/*
-Copy modes
-
-*/
-
-#define DMA_MODE32BYTE DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | \
-                   DMAC_DCMD_DS_32BYTE | DMAC_DCMD_TM
-
-#define DMA_MODE16BYTE DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | \
-                   DMAC_DCMD_DS_16BYTE | DMAC_DCMD_TM
-
-#define DMA_MODE32BIT DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | \
-                   DMAC_DCMD_DS_32BIT
-
-#define DMA_MODE16BIT DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | \
-                   DMAC_DCMD_DS_16BIT
-
-#define DMA_MODE8BIT DMAC_DCMD_SWDH_8 | DMAC_DCMD_DWDH_8 | \
-                   DMAC_DCMD_DS_8BIT | DMAC_DCMD_TM
-
-#define DMA_MODECOPY DMAC_DCMD_SAI
-
-
-
-extern int _dmaCopy(int ch, void *dest, void *src, unsigned int size, unsigned int flags);
-
 /*
  * Copy 'size' bytes from src to dest, in blocks of 32 bytes.
  * size is in bytes and must be a multiple of 32.
  * Both src and dest must be aligned to 32 bytes.
  * Returns 0 on failure, non-zero on success.
  */
-#define ds2_DMAcopy_32Byte(ch, dest, src, size)\
+extern int dma_copy32Byte(int ch, void *dest, void *src, unsigned int size);
-  _dmaCopy(ch, dest, src, size, DMA_MODECOPY | DMA_MODE32BYTE)
+// Blocks of 16 bytes, aligned to 16 bytes
-
+extern int dma_copy16Byte(int ch, void *dest, void *src, unsigned int size);
-/*
+// Blocks of 4 bytes, aligned to 4 bytes
- * Copy 'size' bytes from src to dest, in blocks of 16 bytes.
+extern int dma_copy32Bit(int ch, void *dest, void *src, unsigned int size);
- * size is in bytes and must be a multiple of 16.
+// Blocks of 2 bytes, aligned to 2 bytes
- * Both src and dest must be aligned to 16 bytes.
+extern int dma_copy16Bit(int ch, void *dest, void *src, unsigned int size);
- * Returns 0 on failure, non-zero on success.
+extern int dma_isBusy(int ch);
- */
+extern int dma_isFree(int ch);
-#define ds2_DMAcopy_16Byte(ch, dest, src, size)\
+extern int dma_getFree(void);
-  _dmaCopy(ch, dest, src, size, DMA_MODECOPY | DMA_MODE16BYTE);
-
-/*
- * Copy 'size' bytes from src to dest, in blocks of 32 bits (4 bytes).
- * size is in bytes and must be a multiple of 4.
- * Both src and dest must be aligned to 32 bits (4 bytes).
- * Returns 0 on failure, non-zero on success.
- */
-#define ds2_DMAcopy_32Bit(ch, dest, src, size)\
-  _dmaCopy(ch, dest, src, size, DMA_MODECOPY | DMA_MODE32BIT);
-
-/*
- * Copy 'size' bytes from src to dest, in blocks of 16 bits (2 bytes).
- * size is in bytes and must be a multiple of 2.
- * Both src and dest must be aligned to 16 bits (2 bytes).
- * Returns 0 on failure, non-zero on success.
- */
-#define ds2_DMAcopy_16Bit(ch, dest, src, size)\
-  _dmaCopy(ch, dest, src, size, DMA_MODECOPY | DMA_MODE16BIT)
-
-/*
- * Copy 'size' individual bytes (8 bits at a time) from src to dest.
- * Returns 0 on failure, non-zero on success.
- */
-#define ds2_DMAcopy_8Bit(ch, dest, src, size)\
-  _dmaCopy(ch, dest, src, size, DMA_MODECOPY | DMA_MODE8BIT)
-
-
-
-//Stop DMA transfer
-extern void dma_stop(int ch);
-
-#define ds2_DMA_stop(ch)\
-  dma_stop(ch)
-
-//Wait DMA transfer over
-extern int dma_wait_finish(int ch);
-
-#define ds2_DMA_wait(ch)\
-  dma_wait_finish(ch)
-
-
 
 #ifdef __cplusplus
 }

sdk-modifications/include/ds2_types.h

@@ -1,29 +1,37 @@
 #ifndef __DS2_TYPES_H__
 #define __DS2_TYPES_H__
 
-typedef           unsigned char       u8;
+#ifndef u8
-typedef                    char       s8;
+#define u8	unsigned char
+#endif
 
-typedef           unsigned short      u16;
+#ifndef s8
-typedef                    short      s16;
+#define s8	char
+#endif
 
-typedef           unsigned int        u32;
+#ifndef u16
-typedef                    int        s32;
+#define u16	unsigned short
+#endif
 
-typedef           unsigned long long  u64;
+#ifndef s16
-typedef                    long long  s64;
+#define s16	short
+#endif
 
-typedef  volatile unsigned char       vu8;
+#ifndef u32
-typedef  volatile          char       vs8;
+#define u32 unsigned int
+#endif
 
-typedef  volatile unsigned short      vu16;
+#ifndef s32
-typedef  volatile          short      vs16;
+#define s32 int
+#endif
 
-typedef  volatile unsigned int        vu32;
+#ifndef u64
-typedef  volatile          int        vs32;
+#define u64 unsigned long long
+#endif
 
-typedef  volatile unsigned long long  vu64;
+#ifndef s64
-typedef  volatile          long long  vs64;
+#define s64 long long
+#endif 
 
 #ifndef NULL
 #define NULL 0

sdk-modifications/include/ds2io.h

@@ -8,7 +8,7 @@
 #define SCREEN_WIDTH	256
 #define SCREEN_HEIGHT	192
 
-#define	AUDIO_BUFFER_COUNT 4 // in 1.2, that's 4, but in 0.13 it would be 16 [Neb]
+#define	AUDIO_BUFFER_COUNT 16
 
 #ifdef __cplusplus
 extern "C" {

sdk-modifications/include/fs_common.h

@@ -49,10 +49,9 @@
 
 #define BYTES_PER_READ 512
 
-// MODIFICATION START [Neb]
+#ifndef NULL
-// In libfat by Chishm, some types are #define'd here. In the DS2 SDK,
+ #define NULL 0
-// these types are defined by another header.
+#endif
-#include "ds2_types.h"
 
 #ifndef bool
 #define bool int
@@ -66,7 +65,21 @@
 #define true 1
 #endif
 
-// MODIFICATION END [Neb]
+#ifndef u8
+#define u8 unsigned char
+#endif
+
+#ifndef u16
+#define u16 unsigned short
+#endif
+
+#ifndef u32
+#define u32 unsigned long
+#endif
+
+#ifndef s32
+#define s32 long
+#endif
 
 struct _reent
 {

sdk-modifications/libsrc/Makefile

@@ -13,7 +13,7 @@ CONSOLE_DIR = $(TOPDIR)/console
 FS_DIR = $(TOPDIR)/fs
 KEY_DIR = $(TOPDIR)/key
 ZLIB_DIR = $(TOPDIR)/zlib
-CORE_DIR = $(TOPDIR)/core
+DMA_DIR = $(TOPDIR)/dma
 
 SRC :=
 
@@ -24,17 +24,14 @@ INCLUDES := -I../include
 INC := $(INCLUDES)
 
 CFLAGS := -mips32 -O3 -mno-abicalls -fno-pic -fno-builtin \
-	   -fno-exceptions -ffunction-sections -mno-long-calls\
+	   -fno-exceptions -ffunction-sections -mlong-calls\
-	   -fomit-frame-pointer -msoft-float -G 4 \
+	   -fomit-frame-pointer -msoft-float -G 4
-	   -fgcse-sm -fgcse-las -fgcse-after-reload \
-       -fweb -fpeel-loops
-		  
 
 include $(CONSOLE_DIR)/console.mk
 include $(FS_DIR)/fs.mk
 include $(KEY_DIR)/key.mk
 include $(ZLIB_DIR)/zlib.mk
-include $(CORE_DIR)/core.mk
+include $(DMA_DIR)/dma.mk
 
 #OBJS	:= $(addsuffix .o , $(basename $(notdir $(SRC))))
 #SOBJS	:= $(addsuffix .o , $(basename $(notdir $(SSRC))))

sdk-modifications/libsrc/changes_bag.txt

@@ -1,28 +0,0 @@
-Unofficial libds2a by BassAceGold
-	Based on 0.13 beta Supercard SDK release, contains full lib with changes
-
-
-
-release 1:
-	-inclusion of ds2_unistd.h and ds2_fcntl.h
-	-updated zlib to 1.5.2
-
-release 2:
-	-mkdir no longer freezes
-	-faster fopen times for file reading
-		(no longer searches for the next cluster to write to with read only mode)
-	-makes DS2's DMA (direct memory access hardware) features publically available
-	-adds extra cpu clock speeds (may be unstable)
-		ds2_setCPULevel(level)
-	-can now get the current CPU clock speed as an integer value
-		ds2_getCPUClock()
-
-release 2 fix 1:
-	-added ds2_udelay and ds2_mdelay variant functions.
-		must be used with ds2_setCPULevel for accurate timings,
-		old functions, udelay and mdelay, should not be used with the new
-		cpu clock functions
-	-added further optimizations to makefile
-
-release 2 fix 2:
-	-fat_getDiskSpaceInfo no longer freezes

sdk-modifications/libsrc/core/core.mk

@@ -1,11 +0,0 @@
-#fs.mk
-
-SRC +=  $(CORE_DIR)/ds2_dma.c \
-		$(CORE_DIR)/ds2_cpuclock.c
-
-SSRC +=
-
-INC += -I$(CORE_DIR)
-
-CFLAGS +=
-

sdk-modifications/libsrc/core/ds2_cpuclock.c

@@ -1,272 +0,0 @@
-#include <ds2_types.h>
-
-#include "ds2_cpuclock.h"
-
-#define REG8(addr)  *((volatile u8 *)(addr))
-#define REG16(addr) *((volatile u16 *)(addr))
-#define REG32(addr) *((volatile u32 *)(addr))
-
-#define SDRAM_TRAS      50  /* RAS# Active Time */
-#define SDRAM_RCD       23  /* RAS# to CAS# Delay */
-#define SDRAM_TPC       23  /* RAS# Precharge Time */
-#define SDRAM_TRWL      7   /* Write Latency Time */
-#define SDRAM_TREF      7813    /* Refresh period: 8192 refresh cycles/64ms */
-
-#define EMC_BASE    0xB3010000
-#define EMC_DMCR    (EMC_BASE + 0x80)  /* DRAM Control Register */
-#define REG_EMC_DMCR    REG32(EMC_DMCR)
-#define EMC_RTCSR   (EMC_BASE + 0x84)  /* Refresh Time Control/Status Register */
-#define REG_EMC_RTCSR   REG16(EMC_RTCSR)
-#define EMC_RTCOR   (EMC_BASE + 0x8c)  /* Refresh Time Constant Register */
-#define REG_EMC_RTCOR   REG16(EMC_RTCOR)
-#define EMC_RTCNT   (EMC_BASE + 0x88)  /* Refresh Timer Counter */
-#define REG_EMC_RTCNT   REG16(EMC_RTCNT)
-
-
-
-#define CPM_BASE    0xB0000000
-#define CPM_CPCCR   (CPM_BASE+0x00)
-#define CPM_CPPCR   (CPM_BASE+0x10)
-//#define CPM_RSR     (CPM_BASE+0x08)
-#define REG_CPM_CPCCR   REG32(CPM_CPCCR)
-#define REG_CPM_CPPCR   REG32(CPM_CPPCR)
-#define CPM_CPCCR_CE        (1 << 22)
-
-
-
-
-
-
-#define EMC_DMCR_TRAS_BIT   13
-#define EMC_DMCR_TRAS_MASK  (0x07 << EMC_DMCR_TRAS_BIT)
-#define EMC_DMCR_RCD_BIT    11
-#define EMC_DMCR_RCD_MASK   (0x03 << EMC_DMCR_RCD_BIT)
-#define EMC_DMCR_TPC_BIT    8
-#define EMC_DMCR_TPC_MASK   (0x07 << EMC_DMCR_TPC_BIT)
-#define EMC_DMCR_TRWL_BIT   5
-#define EMC_DMCR_TRWL_MASK  (0x03 << EMC_DMCR_TRWL_BIT)
-#define EMC_DMCR_TRC_BIT    2
-#define EMC_DMCR_TRC_MASK   (0x07 << EMC_DMCR_TRC_BIT)
-
-#define EMC_RTCSR_CKS_BIT   0
-#define EMC_RTCSR_CKS_MASK  (0x07 << EMC_RTCSR_CKS_BIT)
-
-
-#define CPM_CPCCR_LDIV_BIT  16
-#define CPM_CPCCR_LDIV_MASK (0x1f << CPM_CPCCR_LDIV_BIT)
-#define CPM_CPCCR_MDIV_BIT  12
-#define CPM_CPCCR_MDIV_MASK (0x0f << CPM_CPCCR_MDIV_BIT)
-#define CPM_CPCCR_PDIV_BIT  8
-#define CPM_CPCCR_PDIV_MASK (0x0f << CPM_CPCCR_PDIV_BIT)
-#define CPM_CPCCR_HDIV_BIT  4
-#define CPM_CPCCR_HDIV_MASK (0x0f << CPM_CPCCR_HDIV_BIT)
-#define CPM_CPCCR_CDIV_BIT  0
-#define CPM_CPCCR_CDIV_MASK (0x0f << CPM_CPCCR_CDIV_BIT)
-
-
-#define CPM_CPPCR_PLLM_BIT  23
-#define CPM_CPPCR_PLLM_MASK (0x1ff << CPM_CPPCR_PLLM_BIT)
-#define CPM_CPPCR_PLLN_BIT  18
-#define CPM_CPPCR_PLLN_MASK (0x1f << CPM_CPPCR_PLLN_BIT)
-#define CPM_CPPCR_PLLOD_BIT 16
-#define CPM_CPPCR_PLLOD_MASK    (0x03 << CPM_CPPCR_PLLOD_BIT)
-#define CPM_CPPCR_PLLS      (1 << 10)
-#define CPM_CPPCR_PLLBP     (1 << 9)
-#define CPM_CPPCR_PLLEN     (1 << 8)
-#define CPM_CPPCR_PLLST_BIT 0
-#define CPM_CPPCR_PLLST_MASK    (0xff << CPM_CPPCR_PLLST_BIT)
-
-
-#define PLL_M       0
-#define PLL_N       1
-#define PLL_CCLK    2
-#define PLL_HCLK    3
-#define PLL_MCLK    4
-#define PLL_PCLK    5
-
-#define CFG_EXTAL       24000000
-#define EXTAL_CLK       CFG_EXTAL
-
-
-#define __cpm_get_pllm() \
-    ((REG_CPM_CPPCR & CPM_CPPCR_PLLM_MASK) >> CPM_CPPCR_PLLM_BIT)
-
-#define __cpm_get_plln() \
-    ((REG_CPM_CPPCR & CPM_CPPCR_PLLN_MASK) >> CPM_CPPCR_PLLN_BIT)
-
-#define __cpm_get_cdiv() \
-    ((REG_CPM_CPCCR & CPM_CPCCR_CDIV_MASK) >> CPM_CPCCR_CDIV_BIT)
-
-
-static unsigned char pll_m_n[CPU_MAX_LEVEL_EX + 1][6] = {
-        //M, N, CCLK, HCLK, MCLK, PCLK, EXT_CLK=24MHz
-        {10-2, 2-2, 1, 1, 1, 1},    //0    60, 60, 1/1
-        {10-2, 2-2, 0, 1, 1, 1},    //1    120, 60, 1/2
-        {10-2, 2-2, 0, 0, 0, 0},    //2    120, 120, 1/1
-        {12-2, 2-2, 0, 1, 1, 1},    //3    144, 72, 1/2
-        {16-2, 2-2, 0, 1, 1, 1},    //4    192, 96, 1/2
-        {17-2, 2-2, 0, 0, 1, 1},    //5    204, 102, 1/2
-        {20-2, 2-2, 0, 1, 1, 1},    //6    240, 120, 1/2
-        {22-2, 2-2, 0, 2, 2, 2},    //7    264, 88, 1/3
-        {24-2, 2-2, 0, 2, 2, 2},    //8    288, 96, 1/3
-        {25-2, 2-2, 0, 2, 2, 2},    //9    300, 100, 1/3
-        {28-2, 2-2, 0, 2, 2, 2},    //10   336, 112, 1/3
-        {30-2, 2-2, 0, 2, 2, 2},    //11   360, 120, 1/3
-        {32-2, 2-2, 0, 2, 2, 2},    //12   384, 128, 1/3
-        {33-2, 2-2, 0, 2, 2, 2},    //13   396, 132, 1/3
-
-        {34-2, 2-2, 0, 2, 2, 2},    //14   404, 132, 1/3
-        {35-2, 2-2, 0, 2, 2, 2},    //15   420, 132, 1/3
-        {36-2, 2-2, 0, 2, 2, 2},    //16   438, 132, 1/3
-        {37-2, 2-2, 0, 2, 2, 2},    //17   444, 132, 1/3
-        {38-2, 2-2, 0, 2, 2, 2},    //18   456, 132, 1/3
-        //{39-2, 2-2, 0, 2, 2, 2},        //468, instant crash!
-    };
-
-static int _sdram_convert(unsigned int pllin,unsigned int *sdram_dmcr, unsigned int *sdram_div, unsigned int *sdram_tref)
-{
-    register unsigned int ns, dmcr,tmp;
-
-    dmcr = ~(EMC_DMCR_TRAS_MASK | EMC_DMCR_RCD_MASK | EMC_DMCR_TPC_MASK |
-                EMC_DMCR_TRWL_MASK | EMC_DMCR_TRC_MASK) & REG_EMC_DMCR;
-
-    /* Set sdram operation parameter */
-    //pllin unit is KHz
-    ns = 1000000*1024 / pllin;
-    tmp = SDRAM_TRAS*1024/ns;
-    if (tmp < 4) tmp = 4;
-    if (tmp > 11) tmp = 11;
-    dmcr |= ((tmp-4) << EMC_DMCR_TRAS_BIT);
-
-    tmp = SDRAM_RCD*1024/ns;
-    if (tmp > 3) tmp = 3;
-    dmcr |= (tmp << EMC_DMCR_RCD_BIT);
-
-    tmp = SDRAM_TPC*1024/ns;
-    if (tmp > 7) tmp = 7;
-    dmcr |= (tmp << EMC_DMCR_TPC_BIT);
-
-    tmp = SDRAM_TRWL*1024/ns;
-    if (tmp > 3) tmp = 3;
-    dmcr |= (tmp << EMC_DMCR_TRWL_BIT);
-
-    tmp = (SDRAM_TRAS + SDRAM_TPC)*1024/ns;
-    if (tmp > 14) tmp = 14;
-    dmcr |= (((tmp + 1) >> 1) << EMC_DMCR_TRC_BIT);
-
-    *sdram_dmcr = dmcr;
-
-    /* Set refresh registers */
-    unsigned int div;
-    tmp = SDRAM_TREF*1024/ns;
-    div = (tmp + 254)/255;
-    if(div <= 4) div = 1;       //  1/4
-    else if(div <= 16) div = 2; //  1/16
-    else div = 3;               //  1/64
-
-    *sdram_div = ~EMC_RTCSR_CKS_MASK & REG_EMC_RTCSR | div;
-
-    unsigned int divm= 4;
-    while(--div) divm *= 4;
-
-    tmp = tmp/divm + 1;
-    *sdram_tref = tmp;
-
-    return 0;
-}
-
-
-const static int FR2n[] = {
-    1, 2, 3, 4, 6, 8, 12, 16, 24, 32
-};
-
-static unsigned int _pllout;
-static unsigned int _iclk;
-
-static void detect_clockNew(void){
-    _pllout = (__cpm_get_pllm() + 2)* EXTAL_CLK / (__cpm_get_plln() + 2);
-    _iclk = _pllout / FR2n[__cpm_get_cdiv()];
-}
-
-
-//udelay overclock
-void ds2_udelay(unsigned int usec)
-{
-    unsigned int i = usec * (_iclk / 2000000);
-
-    __asm__ __volatile__ (
-        "\t.set noreorder\n"
-        "1:\n\t"
-        "bne\t%0, $0, 1b\n\t"
-        "addi\t%0, %0, -1\n\t"
-        ".set reorder\n"
-        : "=r" (i)
-        : "0" (i)
-    );
-}
-
-//mdelay overclock
-void ds2_mdelay(unsigned int msec)
-{
-    int i;
-    for(i=0;i<msec;i++)
-    {
-        ds2_udelay(1000);
-    }
-}
-
-
-
-
-int ds2_getCPUClock(void){
-    return (_pllout/1000/1000);
-}
-
-
-
-/* convert pll while program is running */
-int ds2_setCPULevel(unsigned int level){
-    unsigned int freq_b;
-    unsigned int dmcr;
-    unsigned int rtcsr;
-    unsigned int tref;
-    unsigned int cpccr;
-    unsigned int cppcr;
-
-    if(level > CPU_MAX_LEVEL_EX) return -1;
-
-    freq_b = (pll_m_n[level][PLL_M]+2)*(EXTAL_CLK/1000)/(pll_m_n[level][PLL_N]+2);
-
-    //freq_b unit is KHz
-    _sdram_convert(freq_b/pll_m_n[level][PLL_MCLK], &dmcr, &rtcsr, &tref);
-
-    cpccr = REG_CPM_CPCCR;
-    cppcr = REG_CPM_CPPCR;
-
-    REG_CPM_CPCCR = ~CPM_CPCCR_CE & cpccr;
-
-    cppcr &= ~(CPM_CPPCR_PLLM_MASK | CPM_CPPCR_PLLN_MASK);
-    cppcr |= (pll_m_n[level][PLL_M] << CPM_CPPCR_PLLM_BIT) | (pll_m_n[level][PLL_N] << CPM_CPPCR_PLLN_BIT);
-
-    cpccr &= ~(CPM_CPCCR_CDIV_MASK | CPM_CPCCR_HDIV_MASK | CPM_CPCCR_PDIV_MASK |
-                CPM_CPCCR_MDIV_MASK | CPM_CPCCR_LDIV_MASK);
-    cpccr |= (pll_m_n[level][PLL_CCLK] << CPM_CPCCR_CDIV_BIT) | (pll_m_n[level][PLL_HCLK] << CPM_CPCCR_HDIV_BIT) |
-                (pll_m_n[level][PLL_MCLK] << CPM_CPCCR_MDIV_BIT) | (pll_m_n[level][PLL_PCLK] << CPM_CPCCR_PDIV_BIT) |
-                (31 << CPM_CPCCR_LDIV_BIT);
-
-    REG_CPM_CPCCR = cpccr;
-    REG_CPM_CPPCR = cppcr;
-
-    REG_CPM_CPCCR |= CPM_CPCCR_CE;
-    //Wait PLL stable
-    while(!(CPM_CPPCR_PLLS & REG_CPM_CPPCR));
-
-    //REG_EMC_DMCR = dmcr;
-    REG_EMC_RTCOR = tref;
-    REG_EMC_RTCNT = tref;
-
-    detect_clockNew();
-    return 0;
-}
-
-

sdk-modifications/libsrc/core/ds2_cpuclock.h

@@ -1,22 +0,0 @@
-#ifndef _DS2_CPUCLOCK_H__
-#define _DS2_CPUCLOCK_H__
-
-
-#define CPU_MAX_LEVEL_EX 18
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-extern int ds2_getCPUClock(void);
-extern int ds2_setCPULevel(unsigned int level);
-extern void udelayOC(unsigned int usec);
-extern void mdelayOC(unsigned int msec);
-
-//#define ds2_setCPUclocklevel ds2_setCPULevel
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif //__DS2_CPUCLOCK_H__

sdk-modifications/libsrc/core/ds2_dma.c

@@ -1,34 +0,0 @@
-#include "ds2_dma.h"
-
-
-
-//register a DMA transfer request
-//ch: channel id request, there are 6 channles, 
-//irq_handler: the DMA interruption handle
-//arg: argument to the handle
-//mode: DMA mode, such as port width, address increased/fixed, and so on
-//type: DMA request type
-extern int dma_request(int ch, void (*irq_handler)(unsigned int), unsigned int arg,
-     unsigned int mode, unsigned int type);
-
-//start DMA transfer, must request a DMA first
-//ch: channel id
-//srcAddr: DMA source address
-//dstAddr: DMA destination address
-//count: DMA transfer count, the total bytes due the mode in dma_request
-extern void dma_start(int ch, unsigned int srcAddr, unsigned int dstAddr,
-         unsigned int count);
-
-
-int _dmaCopy(int ch, void *dest, void *src, unsigned int size, unsigned int flags){
-  int test = 0;
-  if(!(test = dma_request(ch, 0, 0,
-                        //increment dest addr
-                        DMAC_DCMD_DAI | flags,
-                        //auto request type
-                        DMAC_DRSR_RS_AUTO)))
-  {
-    dma_start(ch, (unsigned int)src, (unsigned int)dest, size);
-  }
-  return test;
-}

sdk-modifications/libsrc/core/ds2_dma.h

@@ -1,142 +0,0 @@
-#ifndef _DS2_DMA_H__
-#define _DS2_DMA_H__
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-#define MAX_DMA_NUM 6  /* max 6 channels */
-
-
-// DMA request source register
-#define DMAC_DRSR_RS_BIT    0
-#define DMAC_DRSR_RS_AUTO (8 << DMAC_DRSR_RS_BIT)
-
-
-// DMA channel command register
-#define DMAC_DCMD_SAI       (1 << 23) /* source address increment */
-#define DMAC_DCMD_DAI       (1 << 22) /* dest address increment */
-
-#define DMAC_DCMD_SWDH_BIT  14  /* source port width */
-#define DMAC_DCMD_SWDH_32 (0 << DMAC_DCMD_SWDH_BIT)
-#define DMAC_DCMD_SWDH_8  (1 << DMAC_DCMD_SWDH_BIT)
-#define DMAC_DCMD_SWDH_16 (2 << DMAC_DCMD_SWDH_BIT)
-
-#define DMAC_DCMD_DWDH_BIT  12  /* dest port width */
-#define DMAC_DCMD_DWDH_32 (0 << DMAC_DCMD_DWDH_BIT)
-#define DMAC_DCMD_DWDH_8  (1 << DMAC_DCMD_DWDH_BIT)
- #define DMAC_DCMD_DWDH_16 (2 << DMAC_DCMD_DWDH_BIT)
-
-#define DMAC_DCMD_DS_BIT    8  /* transfer data size of a data unit */
-#define DMAC_DCMD_DS_32BIT    (0 << DMAC_DCMD_DS_BIT)
-#define DMAC_DCMD_DS_8BIT (1 << DMAC_DCMD_DS_BIT)
-#define DMAC_DCMD_DS_16BIT    (2 << DMAC_DCMD_DS_BIT)
-#define DMAC_DCMD_DS_16BYTE   (3 << DMAC_DCMD_DS_BIT)
-#define DMAC_DCMD_DS_32BYTE   (4 << DMAC_DCMD_DS_BIT)
-
-#define DMAC_DCMD_TM        (1 << 7)  /* transfer mode: 0-single 1-block */
-
-
-//detect if channel has completed job
-#define DMAC_DCCSR_TT   (1 << 3)  /* transfer terminated */
-#define DMAC_BASE 0xB3020000
-#define REG32(addr) *((volatile u32 *)(addr))
-#define DMAC_DCCSR(n) (DMAC_BASE + (0x10 + (n) * 0x20)) /* DMA control/status */
-#define REG_DMAC_DCCSR(n) REG32(DMAC_DCCSR((n)))
-
-#define ds2_DMA_isBusy(n) \
-  !(  REG_DMAC_DCCSR((n)) & DMAC_DCCSR_TT )
-
-
-/*
-Copy modes
-
-*/
-
-#define DMA_MODE32BYTE DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | \
-                   DMAC_DCMD_DS_32BYTE | DMAC_DCMD_TM
-
-#define DMA_MODE16BYTE DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | \
-                   DMAC_DCMD_DS_16BYTE | DMAC_DCMD_TM
-
-#define DMA_MODE32BIT DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | \
-                   DMAC_DCMD_DS_32BIT
-
-#define DMA_MODE16BIT DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 | \
-                   DMAC_DCMD_DS_16BIT
-
-#define DMA_MODE8BIT DMAC_DCMD_SWDH_8 | DMAC_DCMD_DWDH_8 | \
-                   DMAC_DCMD_DS_8BIT | DMAC_DCMD_TM
-
-#define DMA_MODECOPY DMAC_DCMD_SAI
-
-
-
-extern int _dmaCopy(int ch, void *dest, void *src, unsigned int size, unsigned int flags);
-
-/*
- * Copy 'size' bytes from src to dest, in blocks of 32 bytes.
- * size is in bytes and must be a multiple of 32.
- * Both src and dest must be aligned to 32 bytes.
- * Returns 0 on failure, non-zero on success.
- */
-#define ds2_DMAcopy_32Byte(ch, dest, src, size)\
-  _dmaCopy(ch, dest, src, size, DMA_MODECOPY | DMA_MODE32BYTE)
-
-/*
- * Copy 'size' bytes from src to dest, in blocks of 16 bytes.
- * size is in bytes and must be a multiple of 16.
- * Both src and dest must be aligned to 16 bytes.
- * Returns 0 on failure, non-zero on success.
- */
-#define ds2_DMAcopy_16Byte(ch, dest, src, size)\
-  _dmaCopy(ch, dest, src, size, DMA_MODECOPY | DMA_MODE16BYTE);
-
-/*
- * Copy 'size' bytes from src to dest, in blocks of 32 bits (4 bytes).
- * size is in bytes and must be a multiple of 4.
- * Both src and dest must be aligned to 32 bits (4 bytes).
- * Returns 0 on failure, non-zero on success.
- */
-#define ds2_DMAcopy_32Bit(ch, dest, src, size)\
-  _dmaCopy(ch, dest, src, size, DMA_MODECOPY | DMA_MODE32BIT);
-
-/*
- * Copy 'size' bytes from src to dest, in blocks of 16 bits (2 bytes).
- * size is in bytes and must be a multiple of 2.
- * Both src and dest must be aligned to 16 bits (2 bytes).
- * Returns 0 on failure, non-zero on success.
- */
-#define ds2_DMAcopy_16Bit(ch, dest, src, size)\
-  _dmaCopy(ch, dest, src, size, DMA_MODECOPY | DMA_MODE16BIT)
-
-/*
- * Copy 'size' individual bytes (8 bits at a time) from src to dest.
- * Returns 0 on failure, non-zero on success.
- */
-#define ds2_DMAcopy_8Bit(ch, dest, src, size)\
-  _dmaCopy(ch, dest, src, size, DMA_MODECOPY | DMA_MODE8BIT)
-
-
-
-//Stop DMA transfer
-extern void dma_stop(int ch);
-
-#define ds2_DMA_stop(ch)\
-  dma_stop(ch)
-
-//Wait DMA transfer over
-extern int dma_wait_finish(int ch);
-
-#define ds2_DMA_wait(ch)\
-  dma_wait_finish(ch)
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif //__DMA_H__
-

sdk-modifications/libsrc/dma/dma.mk

@@ -0,0 +1,9 @@
+#dma.mk
+
+SRC += $(DMA_DIR)/dmacopy.c
+
+SSRC +=
+
+INC += -I$(DMA_DIR)
+
+CFLAGS +=

sdk-modifications/libsrc/dma/dmacopy.c

@@ -0,0 +1,167 @@
+#include <stdlib.h>
+#include "ds2_dma.h"
+#include "ds2_types.h"
+
+#define MAX_DMA_NUM 6  /* max 6 channels */
+
+
+// DMA request source register
+#define DMAC_DRSR_RS_BIT    0
+#define DMAC_DRSR_RS_MASK   (0x2f << DMAC_DRSR_RS_BIT)
+  #define DMAC_DRSR_RS_AUTO (8 << DMAC_DRSR_RS_BIT)
+  #define DMAC_DRSR_RS_UART0OUT (20 << DMAC_DRSR_RS_BIT)
+  #define DMAC_DRSR_RS_UART0IN  (21 << DMAC_DRSR_RS_BIT)
+  #define DMAC_DRSR_RS_SSIOUT   (22 << DMAC_DRSR_RS_BIT)
+  #define DMAC_DRSR_RS_SSIIN    (23 << DMAC_DRSR_RS_BIT)
+  #define DMAC_DRSR_RS_AICOUT   (24 << DMAC_DRSR_RS_BIT)
+  #define DMAC_DRSR_RS_AICIN    (25 << DMAC_DRSR_RS_BIT)
+  #define DMAC_DRSR_RS_MSCOUT   (26 << DMAC_DRSR_RS_BIT)        //SD0
+  #define DMAC_DRSR_RS_MSCIN    (27 << DMAC_DRSR_RS_BIT)
+
+
+// DMA channel command register
+#define DMAC_DCMD_SAI       (1 << 23) /* source address increment */
+#define DMAC_DCMD_DAI       (1 << 22) /* dest address increment */
+#define DMAC_DCMD_SWDH_BIT  14  /* source port width */
+#define DMAC_DCMD_SWDH_MASK (0x03 << DMAC_DCMD_SWDH_BIT)
+  #define DMAC_DCMD_SWDH_32 (0 << DMAC_DCMD_SWDH_BIT)
+  #define DMAC_DCMD_SWDH_8  (1 << DMAC_DCMD_SWDH_BIT)
+  #define DMAC_DCMD_SWDH_16 (2 << DMAC_DCMD_SWDH_BIT)
+#define DMAC_DCMD_DWDH_BIT  12  /* dest port width */
+#define DMAC_DCMD_DWDH_MASK (0x03 << DMAC_DCMD_DWDH_BIT)
+  #define DMAC_DCMD_DWDH_32 (0 << DMAC_DCMD_DWDH_BIT)
+  #define DMAC_DCMD_DWDH_8  (1 << DMAC_DCMD_DWDH_BIT)
+  #define DMAC_DCMD_DWDH_16 (2 << DMAC_DCMD_DWDH_BIT)
+#define DMAC_DCMD_DS_BIT    8  /* transfer data size of a data unit */
+#define DMAC_DCMD_DS_MASK   (0x07 << DMAC_DCMD_DS_BIT)
+  #define DMAC_DCMD_DS_32BIT    (0 << DMAC_DCMD_DS_BIT)
+  #define DMAC_DCMD_DS_8BIT (1 << DMAC_DCMD_DS_BIT)
+  #define DMAC_DCMD_DS_16BIT    (2 << DMAC_DCMD_DS_BIT)
+  #define DMAC_DCMD_DS_16BYTE   (3 << DMAC_DCMD_DS_BIT)
+  #define DMAC_DCMD_DS_32BYTE   (4 << DMAC_DCMD_DS_BIT)
+#define DMAC_DCMD_TM        (1 << 7)  /* transfer mode: 0-single 1-block */
+#define DMAC_DCCSR_TT   (1 << 3)  /* transfer terminated */
+
+#define DMAC_BASE 0xB3020000
+#define REG32(addr) *((volatile u32 *)(addr))
+#define DMAC_DCCSR(n) (DMAC_BASE + (0x10 + (n) * 0x20)) /* DMA control/status */
+#define REG_DMAC_DCCSR(n) REG32(DMAC_DCCSR((n)))
+
+#define __dmac_channel_transmit_end_detected(n) \
+  (  REG_DMAC_DCCSR((n)) & DMAC_DCCSR_TT )
+
+/*
+ * Copy 'size' bytes from src to dest, in blocks of 32 bytes.
+ * size is in bytes and must be a multiple of 32.
+ * Both src and dest must be aligned to 32 bytes.
+ * Returns 0 on failure, non-zero on success.
+ */
+int dma_copy32Byte(int ch, void *dest, void *src, unsigned int size){
+  int test = 0;
+  if(!(test = dma_request(ch, NULL, 0,
+                        //increment dest addr, increment source addr
+                        DMAC_DCMD_DAI | DMAC_DCMD_SAI |
+                        //set src width 32 bytes, set dest width 32 bytes
+                        DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 |
+                        //set copy mode to 32 bytes, copy in blocks
+                        DMAC_DCMD_DS_32BYTE | DMAC_DCMD_TM,
+                        //auto request type
+                        DMAC_DRSR_RS_AUTO)))
+  {
+    dma_start(ch, (unsigned int)src, (unsigned int)dest, size);
+  }
+  return test;
+}
+
+/*
+
+int sampleUsage(in ch, void *dest, void *src, unsigned int size){
+  //channel 0 is used for mmc stuff, so its best to avoid using it
+
+  //initialize and start copy
+  if(dma_copy32Byte(ch, dest, src, size)){
+    dma_wait_finish(ch);//wait for copy to finish
+    dma_stop(ch);//must stop after transfer is done to reset channel
+    return 0;
+  }
+  return -1;
+}
+
+*/
+
+/*
+ * Copy 'size' bytes from src to dest, in blocks of 16 bytes.
+ * size is in bytes and must be a multiple of 16.
+ * Both src and dest must be aligned to 16 bytes.
+ * Returns 0 on failure, non-zero on success.
+ */
+int dma_copy16Byte(int ch, void *dest, void *src, unsigned int size){
+  int test = 0;
+  if(!(test = dma_request(ch, NULL, 0,
+              DMAC_DCMD_DAI | DMAC_DCMD_SAI | DMAC_DCMD_SWDH_16 |
+              DMAC_DCMD_DWDH_16 | DMAC_DCMD_DS_16BYTE | DMAC_DCMD_TM,
+              DMAC_DRSR_RS_AUTO)))
+  {
+    dma_start(ch, (unsigned int)src, (unsigned int)dest, size);
+  }
+
+  return test;
+}
+
+/*
+ * Copy 'size' bytes from src to dest, in blocks of 32 bits (4 bytes).
+ * size is in bytes and must be a multiple of 4.
+ * Both src and dest must be aligned to 32 bits (4 bytes).
+ * Returns 0 on failure, non-zero on success.
+ */
+int dma_copy32Bit(int ch, void *dest, void *src, unsigned int size){
+  int test = 0;
+  if(!(test = dma_request(ch, NULL, 0,
+              DMAC_DCMD_DAI | DMAC_DCMD_SAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 |
+              DMAC_DCMD_DS_32BIT  | DMAC_DCMD_TM,
+              DMAC_DRSR_RS_AUTO)))
+  {
+    dma_start(ch, (unsigned int)src, (unsigned int)dest, size);
+  }
+
+  return test;
+}
+
+/*
+ * Copy 'size' bytes from src to dest, in blocks of 16 bits (2 bytes).
+ * size is in bytes and must be a multiple of 2.
+ * Both src and dest must be aligned to 16 bits (2 bytes).
+ * Returns 0 on failure, non-zero on success.
+ */
+int dma_copy16Bit(int ch, void *dest, void *src, unsigned int size){
+  int test = 0;
+
+  if(!(test = dma_request(ch, NULL, 0,
+              DMAC_DCMD_DAI | DMAC_DCMD_SAI | DMAC_DCMD_SWDH_16 | DMAC_DCMD_DWDH_16 |
+              DMAC_DCMD_DS_16BIT,
+              DMAC_DRSR_RS_AUTO)))
+  {
+    dma_start(ch, (unsigned int)src, (unsigned int)dest, size);
+  }
+
+  return test;
+}
+
+
+//returns if a channel is still copying
+int dma_isBusy(int ch){
+  if(ch < 1 || ch >= MAX_DMA_NUM)
+    return 0;
+
+  return !__dmac_channel_transmit_end_detected(ch);
+}
+
+//returns the first non busy channel
+int dma_getFree(void){
+  int i;
+  for(i = 1; i < MAX_DMA_NUM; i++){
+    if(!dma_isBusy(i))
+      return i;
+  }
+  return -1;
+}

sdk-modifications/libsrc/dma/ds2_dma.h

@@ -0,0 +1,54 @@
+#ifndef __DMA_H__
+#define __DMA_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//register a DMA transfer request
+//ch: channel id request, there are 6 channles, 
+//irq_handler: the DMA interruption handle
+//arg: argument to the handle
+//mode: DMA mode, such as port width, address increased/fixed, and so on
+//type: DMA request type
+extern int dma_request(int ch, void (*irq_handler)(unsigned int), unsigned int arg,
+		 unsigned int mode, unsigned int type);
+
+//start DMA transfer, must request a DMA first
+//ch: channel id
+//srcAddr: DMA source address
+//dstAddr: DMA destination address
+//count: DMA transfer count, the total bytes due the mode in dma_request
+extern void dma_start(int ch, unsigned int srcAddr, unsigned int dstAddr,
+	       unsigned int count);
+
+//Stop DMA transfer
+extern void dma_stop(int ch);
+
+//Wait DMA transfer over
+extern int dma_wait_finish(int ch);
+
+
+/*
+ * Copy 'size' bytes from src to dest, in blocks of 32 bytes.
+ * size is in bytes and must be a multiple of 32.
+ * Both src and dest must be aligned to 32 bytes.
+ * Returns 0 on failure, non-zero on success.
+ */
+extern int dma_copy32Byte(int ch, void *dest, void *src, unsigned int size);
+// Blocks of 16 bytes, aligned to 16 bytes
+extern int dma_copy16Byte(int ch, void *dest, void *src, unsigned int size);
+// Blocks of 4 bytes, aligned to 4 bytes
+extern int dma_copy32Bit(int ch, void *dest, void *src, unsigned int size);
+// Blocks of 2 bytes, aligned to 2 bytes
+extern int dma_copy16Bit(int ch, void *dest, void *src, unsigned int size);
+extern int dma_isBusy(int ch);
+extern int dma_isFree(int ch);
+extern int dma_getFree(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //__DMA_H__
+

sdk-modifications/libsrc/fs/directory.c

@@ -135,7 +135,7 @@ bool _FAT_directory_isValidLfn (const char* name) {
 	return true;
 }
 bool _FAT_directory_isValidAlias (const char* name) {
-	//return false;//disables this function to preserve file name casing
+	return false;//disables this function to preserve file name casing
 
 	u32 i;
 	u32 nameLength;
@@ -159,7 +159,7 @@ bool _FAT_directory_isValidAlias (const char* name) {
 	// Make sure the name doesn't contain any control codes
 	//if name isn't all capitals, then it is not a valid short name
 	for (i = 0; i < nameLength; i++) {
-		if (name[i] > 0x5A && name[i]!= 0x20) {
+		if (name[i] < 0x5A && name[i]!=0x20) {
 			return false;
 		}
 	}
@@ -756,37 +756,7 @@ static bool _FAT_directory_entryExists (PARTITION* partition, const char* name,
 	return false;
 }
 
-//a fix for checking if a short file name is already in use.
-static bool _FAT_directory_entryExistsSFN (PARTITION* partition, const char* name, u32 dirCluster) {
-	DIR_ENTRY tempEntry;
-	bool foundFile;
-	char alias[MAX_ALIAS_LENGTH];
-	u32 dirnameLength;
 
-	dirnameLength = strnlen(name, MAX_FILENAME_LENGTH);
-
-	if (dirnameLength >= MAX_FILENAME_LENGTH) {
-		return false;
-	}
-
-
-	// Make sure the entry doesn't already exist
-	foundFile = _FAT_directory_getFirstEntry (partition, &tempEntry, dirCluster);
-
-	while (foundFile) {			// It hasn't already found the file
-		if(!strcasecmp(name, tempEntry.d_name))
-			return true;
-
-		// Check if the alias matches
-		_FAT_directory_entryGetAlias (tempEntry.entryData, alias);
-		if ((dirnameLength == strnlen(alias, MAX_ALIAS_LENGTH))
-			&& (strcasecmp(alias, name) == 0)) {
-				return true;
-		}
-		foundFile = _FAT_directory_getNextEntry (partition, &tempEntry);
-	}
-	return false;
-}
 
 bool _FAT_directory_addEntry (PARTITION* partition, DIR_ENTRY* entry, u32 dirCluster) {
 	u32 entrySize;
@@ -863,7 +833,7 @@ bool _FAT_directory_addEntry (PARTITION* partition, DIR_ENTRY* entry, u32 dirClu
 			++ j;
 		}
 		// Short filename
-		strupr (entry->entryData);
+		strupr (entry->d_name);
 	}else {
 		// Long filename needed
 		//memset( entry->unicodeFilename, 0, 512 );
@@ -913,7 +883,7 @@ bool _FAT_directory_addEntry (PARTITION* partition, DIR_ENTRY* entry, u32 dirClu
 			i++;
 			alias[6] = '0' + ((i / 10) % 10);	// 10's digit
 			alias[7] = '0' + (i % 10);	// 1's digit
-		} while (_FAT_directory_entryExistsSFN (partition, alias, dirCluster) && (i < 100));
+		} while (_FAT_directory_entryExists (partition, alias, dirCluster) && (i < 100));
 		if (i == 100) {
 			// Couldn't get a tail number
 			return false;

sdk-modifications/libsrc/fs/fat_misc.c

@@ -54,16 +54,14 @@ int getDirSize( const char * path, int includeSubdirs, unsigned int * dirSize )
     if( strlen(dirPath) > MAX_FILENAME_LENGTH )
         return false;
 
-    DIR_STATE_STRUCT *dir;
+    DIR_STATE_STRUCT *dir;
	dir = fat_opendir((const char*)dirPath);
-	dir = fat_opendir((const char*)dirPath);
     if (dir == NULL)
         return false;
    
-    
     struct stat stat_buf;
 	DIR_ENTRY *currentEntry;
     char* filename;
 
-	while((currentEntry = fat_readdir_ex(dir, &stat_buf)) != NULL)
+	while(fat_readdir_ex(dir, &stat_buf) != NULL)
 	{
 		filename = currentEntry->d_name;
 

sdk-modifications/libsrc/fs/fs.mk

@@ -14,7 +14,7 @@ SRC += $(FS_DIR)/cache.c	\
 		$(FS_DIR)/disc_io/disc.c	\
 		$(FS_DIR)/disc_io/io_ds2_mmcf.c	\
         $(FS_DIR)/ds2_fcntl.c	\
-        $(FS_DIR)/ds2_unistd.c
+        $(FS_DIR)/ds2_unistd.c	\
 
 SSRC +=
 

sdk-modifications/libsrc/fs/fs_common.h

@@ -49,10 +49,9 @@
 
 #define BYTES_PER_READ 512
 
-// MODIFICATION START [Neb]
+#ifndef NULL
-// In libfat by Chishm, some types are #define'd here. In the DS2 SDK,
+ #define NULL 0
-// these types are defined by another header.
+#endif
-#include "ds2_types.h"
 
 #ifndef bool
 #define bool int
@@ -66,7 +65,21 @@
 #define true 1
 #endif
 
-// MODIFICATION END [Neb]
+#ifndef u8
+#define u8 unsigned char
+#endif
+
+#ifndef u16
+#define u16 unsigned short
+#endif
+
+#ifndef u32
+#define u32 unsigned long
+#endif
+
+#ifndef s32
+#define s32 long
+#endif
 
 struct _reent
 {

sdk-modifications/libsrc/zlib/README

@@ -1,8 +1 @@
-This is a modified source release of zlib. 
+This is a modified source release of zlib. zconf.h removes a reference to sys/types.h, which creates type conflicts on the DS2 SDK. For a pristine source release of zlib, please visit <http://zlib.net/>.
-
-Changes:
-	zconf.h removes a reference to sys/types.h, which creates type conflicts on the DS2 SDK. 
-	gzguts.h removes standard c library includes for DS2 SDK equivalents
-	
-
-For a pristine source release of zlib, please visit <http://zlib.net>.