ANESE/research/obelisk.me.uk/6502/architecture.html
2017-11-12 12:48:01 -08:00

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<H2>Basic Architecture</H2>
<P>The 6502 microprocessor is a relatively simple 8 bit CPU with
only a few internal registers capable of addressing at most 64Kb
of memory via its 16 bit address bus. The processor is little
endian and expects addresses to be stored in memory least significant
byte first.</P>
<P>The first 256 byte page of memory ($0000-$00FF) is referred
to as 'Zero Page' and is the focus of a number of special addressing
modes that result in shorter (and quicker) instructions or allow
indirect access to the memory. The second page of memory ($0100-$01FF)
is reserved for the system stack and which cannot be relocated.</P>
<P>The only other reserved locations in the memory map are the
very last 6 bytes of memory $FFFA to $FFFF which must be programmed
with the addresses of the non-maskable interrupt handler ($FFFA/B),
the power on reset location ($FFFC/D) and the BRK/interrupt request
handler ($FFFE/F) respectively.</P>
<P>The 6502 does not have any special support of hardware devices
so they must be mapped to regions of memory in order to exchange
data with the hardware latches.</P>
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<HR ALIGN=LEFT>This page was last updated on 2nd January 2002
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