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fee73df07a
The name is derived directly from the device path. Change-Id: If2053d14f0e38a5ee0159b47a66d45ff3dff649a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1471 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
40 lines
1.6 KiB
C
40 lines
1.6 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef RS780_CHIP_H
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#define RS780_CHIP_H
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/* Member variables are defined in devicetree.cb. */
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struct southbridge_amd_rs780_config
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{
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u8 gppsb_configuration; /* The configuration of General Purpose Port, A/B/C/D/E. */
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u8 gpp_configuration; /* The configuration of General Purpose Port, C/D. */
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u16 port_enable; /* Which port is enabled? GFX(2,3), GPP(4,5,6,7) */
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u8 gfx_dev2_dev3; /* for GFX Core initialization REFCLK_SEL */
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u8 gfx_dual_slot; /* Is it dual graphics slots */
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u8 gfx_lane_reversal; /* Single/Dual slot lan reversal */
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u8 gfx_tmds; /* whether support TMDS? */
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u8 gfx_compliance; /* whether support compliance? */
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u8 gfx_reconfiguration; /* Dynamic Lind Width Control */
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u8 gfx_link_width; /* Desired width of lane 2 */
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u8 gfx_pcie_config; /* GFX PCIE Modes */
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u8 gfx_ddi_config; /* GFX DDI Modes */
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};
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#endif /* RS780_CHIP_H */
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