switch-coreboot/src
Aaron Durbin 685ab2a2f2 intel/skylake: ensure the RTC time is set
In 2014 or so the RTC code was changed to assume the ALTCENTRY
register (0x32) as always being utilized for creating an rtc_time.
However, one needs to ensure it's set at least once otherwise
the year field in rtc_time is not sane.

In practice this doesn't matter unless somone wants to use the
full year value. cmos_init() should do the same thing in the
rtc fail case, but the machine I had never had that set correctly.

BUG=chrome-os-partner:47388
BRANCH=None
TEST=Booted glados w/ 0xff ALTCENTRY value. New value is 0x20.

Change-Id: I028f801c5d717a0018ed00df82c25b466d64670c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7d5be5bc697bef60a264ddc7f67755aa96088d36
Original-Change-Id: I6e12a30c9e08d8c1002e4cef0f143f0f88009e92
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/311264
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/12411
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-13 00:52:54 +01:00
..
acpi tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
arch cpu/amd: Add CC6 support 2015-11-11 18:45:14 +01:00
commonlib commonlib: Remove unused static function. 2015-11-09 12:26:31 +01:00
console arm64: remove secmon 2015-11-07 03:28:06 +01:00
cpu cpu/amd: Add CC6 support 2015-11-11 18:45:14 +01:00
device tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
drivers elog: fix improper assumption for year values 2015-11-13 00:52:48 +01:00
ec tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
include cpu/amd: Add CC6 support 2015-11-11 18:45:14 +01:00
lib arm/arm64: Generalize bootblock C entry point 2015-11-11 05:08:07 +01:00
mainboard mainboard/asus/kgpe-d16: Add sata_alpm CMOS option 2015-11-12 21:22:11 +01:00
northbridge northbridge/amd/amdmct/mct_ddr3: Update prefetcher configuration 2015-11-12 22:16:16 +01:00
soc intel/skylake: ensure the RTC time is set 2015-11-13 00:52:54 +01:00
southbridge southbridge/amd/sb700: Fix SATA port 4/5 drive detection 2015-11-12 22:16:54 +01:00
superio Drop SuperIO fintek/f71889 2015-11-10 20:16:49 +01:00
vendorcode AMD Merlin Falcon: update vendorcode header files to CarrizoPI 1.1.0.1 2015-11-12 22:42:04 +01:00
Kconfig arm/arm64: Generalize bootblock C entry point 2015-11-11 05:08:07 +01:00