Ronald G. Minnich fc135688be Working changes for the technoloand sbc 710. MTRRs can now be configured as ... either ROM starting at 0xc0000 or starting at 0xf0000. For the 0xf0000 case, 0xc0000 to 0xeffff is configured as FB, i.e. non-cacheable.		2001-10-24 19:13:21 +00:00
..
arch	gctags is gone on new redhat!	2001-10-19 18:24:16 +00:00
boot	added Eric's Uniform Boot stuff	2001-03-14 09:05:27 +00:00
config	Needed now for config.	2001-07-05 03:28:57 +00:00
cpu	Working changes for the technoloand sbc 710. MTRRs can now be configured as	2001-10-24 19:13:21 +00:00
etherboot	Code changes from my work and the AMD760MP chipset.	2001-08-08 02:45:10 +00:00
include	added debug option for get_byte to dump every byte.	2001-10-24 16:13:42 +00:00
kernel_patches	Fixes for 440gx and bx	2001-09-27 20:05:07 +00:00
lib	added debug option for get_byte to dump every byte.	2001-10-24 16:13:42 +00:00
mainboard	Working changes for the technoloand sbc 710. MTRRs can now be configured as	2001-10-24 19:13:21 +00:00
northbridge	No real change. For chipset_init.inc, DONT ENABLE SMA (shared memory access)	2001-10-15 22:14:00 +00:00
northsouthbridge/sis	Enable IDE (courtesy Adam Agnew and Tiara)	2001-10-05 03:56:58 +00:00
pc80	Code changes from my work and the AMD760MP chipset.	2001-08-08 02:45:10 +00:00
pcibridge/TI/pci1225	added files for Tyson's new stuff.	2001-02-09 04:38:11 +00:00
ram	reorg	2000-10-17 03:24:23 +00:00
rom	added debug option for get_byte to dump every byte.	2001-10-24 16:13:42 +00:00
sdram	pci_ids.h --- Added new ids.	2001-08-07 23:41:49 +00:00
southbridge	comment out a bad idea -- no need to enable IDE here.	2001-10-15 13:51:46 +00:00
superio	A few more changes for the SBC 710	2001-10-18 22:28:14 +00:00