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https://github.com/fail0verflow/switch-coreboot.git
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98d3059a2d
FLASH. It is far simpler than before. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@109 f3766cd6-281f-0410-b1cd-43a5c92072e9
240 lines
6.3 KiB
C
240 lines
6.3 KiB
C
/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 Stefan Reinauer <stepan@coresystems.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/types.h>
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#include <arch/io.h>
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#include <console/console.h>
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#include <console/loglevel.h>
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#include <lar.h>
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#include <linuxbios_tables.h>
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#include "config.h"
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/* these prototypes should go into headers */
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void uart_init(void);
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void console_init(void);
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void die(const char *msg);
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int find_file(struct mem_file *archive, char *filename, struct mem_file *result);
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// Is this value correct?
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#define DCACHE_RAM_SIZE 0x8000
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void post_code(u8 value)
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{
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outb(value, 0x80);
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}
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static void stop_ap(void)
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{
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// nothing yet
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post_code(0xf0);
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}
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static void enable_superio(void)
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{
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// nothing yet
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post_code(0xf1);
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}
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static void enable_rom(void)
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{
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// nothing here yet
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post_code(0xf2);
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}
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void stage1_main(u32 bist)
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{
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int ret;
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struct mem_file archive, result;
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int elfboot_mem(struct lb_memory *mem, void *where, int size);
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/* we can't statically init this hack. */
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unsigned char *faker[64];
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struct lb_memory *mem = (struct lb_memory*) &faker;
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mem->tag = LB_TAG_MEMORY;
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mem->size = 28;
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mem->map[0].start.lo = mem->map[0].start.hi = 0;
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mem->map[0].size.lo = (32*1024*1024);
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mem->map[0].size.hi = 0;
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mem->map[0].type = LB_MEM_RAM;
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post_code(0x02);
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// before we do anything, we want to stop if we dont run
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// on the bootstrap processor.
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if (bist==0) {
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// stop secondaries
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stop_ap();
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}
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// We have cache as ram running and can start executing code in C.
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//
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enable_superio();
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//
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uart_init(); // initialize serial port
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console_init(); // print banner
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if (bist!=0) {
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printk(BIOS_INFO, "BIST FAILED: %08x", bist);
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die("");
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}
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// enable rom
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enable_rom();
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// location and size of image.
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// FIXME this should be defined in the VPD area
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// but NOT IN THE CODE.
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archive.len=LINUXBIOS_ROMSIZE_KB*1024;
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archive.start=(void *)(0UL-archive.len);
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/* This won't work; the for loop in lib/lar.c will always
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* fail as adding len to start will be 0.
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* shave off 0x1000 since we know that is the boot block
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*/
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archive.len-=0x1000;
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printk(BIOS_INFO, "Start search at 0x%x, size %d\n", archive.start, archive.len);
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// FIXME check integrity
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// fixme: choose an initram image (normal/fallback)
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// find first initram
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ret = run_file(&archive, "normal/initram", (void *)(512*1024)); //CONFIG_CARBASE;
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if (ret)
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die("Failed ram init code\n");
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printk(BIOS_INFO, "Done ram init code\n");
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/* this is nasty. And, it has to be done this way. Sorry! */
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/* we have to turn off CAR, and do some other things, and it has to be done
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* inline -- you can't call a function
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*/
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__asm__ volatile (
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/*
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FIXME : backup stack in CACHE_AS_RAM into mmx and sse and after we get STACK up, we restore that.
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It is only needed if we want to go back
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*/
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/* We don't need cache as ram for now on */
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/* disable cache */
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"movl %cr0, %eax\n\t"
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"orl $(0x1<<30),%eax\n\t"
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"movl %eax, %cr0\n\t"
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/* clear sth */
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"movl $0x269, %ecx\n\t" /* fix4k_c8000*/
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"xorl %edx, %edx\n\t"
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"xorl %eax, %eax\n\t"
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"wrmsr\n\t"
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#if DCACHE_RAM_SIZE > 0x8000
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"movl $0x268, %ecx\n\t" /* fix4k_c0000*/
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"wrmsr\n\t"
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#endif
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/* Set the default memory type and disable fixed and enable variable MTRRs */
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"movl $0x2ff, %ecx\n\t"
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// "movl $MTRRdefType_MSR, %ecx\n\t"
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"xorl %edx, %edx\n\t"
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/* Enable Variable and Disable Fixed MTRRs */
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"movl $0x00000800, %eax\n\t"
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"wrmsr\n\t"
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#if defined(CLEAR_FIRST_1M_RAM)
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/* enable caching for first 1M using variable mtrr */
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"movl $0x200, %ecx\n\t"
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"xorl %edx, %edx\n\t"
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"movl $(0 | 1), %eax\n\t"
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// "movl $(0 | MTRR_TYPE_WRCOMB), %eax\n\t"
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"wrmsr\n\t"
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"movl $0x201, %ecx\n\t"
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"movl $0x0000000f, %edx\n\t" /* AMD 40 bit 0xff*/
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"movl $((~(( 0 + 0x100000) - 1)) | 0x800), %eax\n\t"
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"wrmsr\n\t"
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#endif
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/* enable cache */
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"movl %cr0, %eax\n\t"
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"andl $0x9fffffff,%eax\n\t"
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"movl %eax, %cr0\n\t"
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#if defined(CLEAR_FIRST_1M_RAM)
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/* clear the first 1M */
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"movl $0x0, %edi\n\t"
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"cld\n\t"
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"movl $(0x100000>>2), %ecx\n\t"
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"xorl %eax, %eax\n\t"
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"rep stosl\n\t"
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/* disable cache */
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"movl %cr0, %eax\n\t"
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"orl $(0x1<<30),%eax\n\t"
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"movl %eax, %cr0\n\t"
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/* enable caching for first 1M using variable mtrr */
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"movl $0x200, %ecx\n\t"
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"xorl %edx, %edx\n\t"
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"movl $(0 | 6), %eax\n\t"
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// "movl $(0 | MTRR_TYPE_WRBACK), %eax\n\t"
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"wrmsr\n\t"
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"movl $0x201, %ecx\n\t"
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"movl $0x0000000f, %edx\n\t" /* AMD 40 bit 0xff*/
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"movl $((~(( 0 + 0x100000) - 1)) | 0x800), %eax\n\t"
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"wrmsr\n\t"
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/* enable cache */
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"movl %cr0, %eax\n\t"
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"andl $0x9fffffff,%eax\n\t"
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"movl %eax, %cr0\n\t"
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"invd\n\t"
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/*
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FIXME: I hope we don't need to change esp and ebp value here, so we can restore value from mmx sse back
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But the problem is the range is some io related, So don't go back
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*/
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#endif
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);
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ret = run_file(&archive, "normal/stage2", (void *)0x1000);
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if (ret)
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die("FATAL: Failed in stage2 code");
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printk(BIOS_INFO, "Done stage2 code\n");
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ret = find_file(&archive, "normal/payload", &result);
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if (ret) {
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printk(BIOS_INFO, "no such name %s\n", "payload");
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die("cachemain finding payload");
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}
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ret = elfboot_mem(mem, result.start, result.len);
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printk(BIOS_INFO, "elfboot_mem returns %d\n", ret);
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die ("FATAL: This is as far as it goes\n");
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}
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