mirror of
https://github.com/fail0verflow/switch-coreboot.git
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7f949f70f5
Phase 1: done Phase 2: early setup ... Phase 2: done Phase 3: Enumerating buses... qemu-x86 enable_dev done dev_phase3_scan: scanning Root Device scan_static_bus for root(Root Device) cpus: Unknown device path type: 0 cpus() enabled i440bxemulation_enable_dev: i440bxemulation_enable_dev: DONE northbridge_intel_i440bxemulation() enabled northbridge_intel_i440bxemulation() scanning... dev_phase3_scan: scanning pci_scan_bus start PCI: pci_scan_bus for bus 00 PCI: scan devfn 0x0 to 0xff PCI: devfn 0x0 PCI: pci_scan_bus pci_scan_get_dev returns dev <NULL> Change dts compiler to emit a new struct member, dtsname, for devices, so we can get actual useful names for things. Several mods and printks added. printk(BIOS_SPEW gives no output for reasons I don't understand. Next in line is bringing back v2 support for pci, but not doing it the way v2 does it. note the cpus() printk above. cpus don't have a valid path yet. We still need to work out the dts syntax for systems with multiple links (opteron) Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@163 f3766cd6-281f-0410-b1cd-43a5c92072e9
29 lines
485 B
Text
29 lines
485 B
Text
/{
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config="mainboard,emulation,qemu-x86";
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enabled;
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cpus {
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enabled;
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};
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northbridge,intel,i440bxemulation{
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enabled;
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config="northbridge,intel,i440bxemulation";
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pcipath = "0,0";
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/* southbridge,intel,piix4{
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pcipath = "0,0";
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enabled;
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};
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*/
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};
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};
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%%
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struct mainboard_emulation_qemu_x86_config root = {
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.nothing = 1,
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};
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struct northbridge_intel_i440bx_config northbridge_intel_i440bxemulation = {
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.ramsize = CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION_RAMSIZE,
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};
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