switch-coreboot/southbridge
Ronald G. Minnich f28a44eb48 This now compiles (with many warnings but ...) and tries to build a rom
image, and fails: 
  LAR     build/coreboot.rom
Bootblock coreboot.bootblock does not appear to be a bootblock.
Error adding the bootblock to the LAR.
make: *** [/home/rminnich/src/bios/coreboot-v3/build/coreboot.rom] Error 
1

Next step is to get rid of all warnings that are not #warning. 

Then it is on to simnow. 

Anyone who wants to work on the warnings is most welcome to. 

DBE62 still builds with no problems. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@808 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-24 02:59:05 +00:00
..
amd This now compiles (with many warnings but ...) and tries to build a rom 2008-08-24 02:59:05 +00:00
intel/i82371eb Minor cosmetic and/or license header fixes (trivial). 2008-08-11 21:01:54 +00:00
nvidia/mcp55 The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of 2008-08-22 18:24:53 +00:00