Ronald G. Minnich ee163f3c18 ram size now set from SPD. ... git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1178 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2003-10-02 22:54:43 +00:00
..
arch	It builds!	2003-09-26 16:12:23 +00:00
boot	more fixes for via ... plus a little more spew.	2003-09-30 23:53:45 +00:00
config	default USE_FALLBACK_IMAGE to 0	2003-10-01 17:28:48 +00:00
console	updates from YhLu, plus fixes for PPC/K8 issues.	2003-07-30 03:05:20 +00:00
cpu	It builds!	2003-09-26 16:12:23 +00:00
devices	success. It boots as a bproc slave now.	2003-10-02 18:16:07 +00:00
include	- Remove dead argument to hypertransport_scan_chain	2003-09-04 01:25:55 +00:00
lib	- First pass at s2880 support.	2003-07-21 20:13:45 +00:00
mainboard	First SPD code in and working!	2003-10-02 22:48:28 +00:00
northbridge	ram size now set from SPD.	2003-10-02 22:54:43 +00:00
pc80	uses statement missing	2003-10-01 21:14:52 +00:00
pmc/altimus/mpc7410	moved cpu code to cpu/ppc/mpc74xx	2003-07-24 21:05:02 +00:00
ram	- Add missing carriage return in ramtest.c	2003-07-12 01:46:05 +00:00
sdram	- First pass at s2880 support.	2003-07-21 20:13:45 +00:00
southbridge	First SPD code in and working!	2003-10-02 22:48:28 +00:00
stream	IDE support	2003-07-14 17:08:57 +00:00
superio/NSC	- 1.1.4	2003-09-02 17:16:48 +00:00