mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
Change-Id: I5e0ec360597cd95cb6510fb32b04d8931e6a33db Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3674 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
202 lines
3.8 KiB
C
202 lines
3.8 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 Samsung Electronics
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <assert.h>
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#include "gpio.h"
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#include "cpu.h"
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#include "pinmux.h"
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static void exynos_pinmux_uart(int start, int count)
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{
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int i;
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for (i = start; i < start + count; i++) {
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gpio_set_pull(i, GPIO_PULL_NONE);
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gpio_cfg_pin(i, GPIO_FUNC(0x2));
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}
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}
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void exynos_pinmux_uart0(void)
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{
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exynos_pinmux_uart(GPIO_A00, 4);
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}
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void exynos_pinmux_uart1(void)
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{
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exynos_pinmux_uart(GPIO_A04, 4);
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}
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void exynos_pinmux_uart2(void)
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{
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exynos_pinmux_uart(GPIO_A10, 4);
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}
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void exynos_pinmux_uart3(void)
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{
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exynos_pinmux_uart(GPIO_A14, 2);
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}
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static void exynos_pinmux_sdmmc(int start, int start_ext)
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{
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int i;
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if (start_ext) {
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for (i = start_ext; i <= (start_ext + 3); i++) {
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gpio_cfg_pin(i, GPIO_FUNC(0x2));
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gpio_set_pull(i, GPIO_PULL_UP);
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gpio_set_drv(i, GPIO_DRV_4X);
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}
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}
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for (i = 0; i < 3; i++) {
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gpio_cfg_pin(start + i, GPIO_FUNC(0x2));
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gpio_set_pull(start + i, GPIO_PULL_NONE);
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gpio_set_drv(start + i, GPIO_DRV_4X);
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}
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for (i = 3; i <= 6; i++) {
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gpio_cfg_pin(start + i, GPIO_FUNC(0x2));
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gpio_set_pull(start + i, GPIO_PULL_UP);
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gpio_set_drv(start + i, GPIO_DRV_4X);
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}
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}
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void exynos_pinmux_sdmmc0(void)
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{
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gpio_set_pull(GPIO_C02, GPIO_PULL_UP);
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exynos_pinmux_sdmmc(GPIO_C00, GPIO_C30);
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}
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void exynos_pinmux_sdmmc1(void)
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{
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exynos_pinmux_sdmmc(GPIO_C10, GPIO_D14);
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}
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void exynos_pinmux_sdmmc2(void)
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{
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exynos_pinmux_sdmmc(GPIO_C20, 0);
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}
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static void exynos_pinmux_spi(int start, int cfg)
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{
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int i;
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for (i = start; i < start + 4; i++)
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gpio_cfg_pin(i, cfg);
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}
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void exynos_pinmux_spi0(void)
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{
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exynos_pinmux_spi(GPIO_A20, 0x2);
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}
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void exynos_pinmux_spi1(void)
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{
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exynos_pinmux_spi(GPIO_A24, 0x2);
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}
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void exynos_pinmux_spi2(void)
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{
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exynos_pinmux_spi(GPIO_B11, 0x5);
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}
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void exynos_pinmux_spi3(void)
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{
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exynos_pinmux_spi(GPIO_F10, 0x2);
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}
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void exynos_pinmux_spi4(void)
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{
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int i;
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for (i = 0; i < 2; i++) {
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gpio_cfg_pin(GPIO_F02 + i, GPIO_FUNC(0x4));
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gpio_cfg_pin(GPIO_E04 + i, GPIO_FUNC(0x4));
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}
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}
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static void exynos_pinmux_i2c(int start, int func)
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{
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gpio_cfg_pin(start, GPIO_FUNC(func));
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gpio_cfg_pin(start + 1, GPIO_FUNC(func));
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gpio_set_pull(start, GPIO_PULL_NONE);
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gpio_set_pull(start + 1, GPIO_PULL_NONE);
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}
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void exynos_pinmux_i2c0(void)
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{
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exynos_pinmux_i2c(GPIO_B30, 0x2);
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}
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void exynos_pinmux_i2c1(void)
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{
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exynos_pinmux_i2c(GPIO_B32, 0x2);
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}
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void exynos_pinmux_i2c2(void)
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{
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exynos_pinmux_i2c(GPIO_A06, 0x3);
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}
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void exynos_pinmux_i2c3(void)
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{
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exynos_pinmux_i2c(GPIO_A12, 0x3);
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}
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void exynos_pinmux_i2c4(void)
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{
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exynos_pinmux_i2c(GPIO_A20, 0x3);
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}
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void exynos_pinmux_i2c5(void)
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{
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exynos_pinmux_i2c(GPIO_A22, 0x3);
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}
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void exynos_pinmux_i2c6(void)
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{
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exynos_pinmux_i2c(GPIO_B13, 0x4);
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}
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void exynos_pinmux_i2c7(void)
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{
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exynos_pinmux_i2c(GPIO_B22, 0x3);
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}
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void exynos_pinmux_i2c8(void)
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{
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exynos_pinmux_i2c(GPIO_B34, 0x2);
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}
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void exynos_pinmux_i2c9(void)
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{
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exynos_pinmux_i2c(GPIO_B36, 0x2);
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}
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void exynos_pinmux_i2c10(void)
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{
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exynos_pinmux_i2c(GPIO_B40, 0x2);
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}
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void exynos_pinmux_dphpd(void)
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{
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gpio_cfg_pin(GPIO_X07, GPIO_FUNC(0x3));
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gpio_set_pull(GPIO_X07, GPIO_PULL_NONE);
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}
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