mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
32c9f3d330
According to datasheets for Intel ICH/PCH, it works for chipsets from ICH7 to 9-series PCH, with PCI device address D31:F2. BUG=None BRANCH=None TEST=None Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/15106 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Change-Id: If1ddd7208108bda949b5a94894a7bf9e8bfe1e5f Reviewed-on: https://chromium-review.googlesource.com/388318 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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| .. | ||
| ahci.c | ||
| amb.c | ||
| cpu.c | ||
| gfx.c | ||
| gpio.c | ||
| inteltool.8 | ||
| inteltool.c | ||
| inteltool.h | ||
| ivy_memory.c | ||
| Makefile | ||
| memory.c | ||
| pcie.c | ||
| powermgt.c | ||
| rootcmplx.c | ||
| spi.c | ||