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decd062875
There's nothing intel-specific about the current mrc_cache support. It's logic manages saving non-volatile areas into the boot media. Therefore, expose it to the rest of the system for any and all to use. BUG=b:69614064 Change-Id: I3b331c82a102f88912a3e10507a70207fb20aecc Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/22901 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
16 lines
513 B
Makefile
16 lines
513 B
Makefile
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romstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
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ramstage-$(CONFIG_CACHE_MRC_SETTINGS) += mrc_cache.c
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# Create and add the MRC cache to the cbfs image
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ifneq ($(CONFIG_CHROMEOS),y)
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$(obj)/mrc.cache: $(obj)/config.h
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dd if=/dev/zero count=1 \
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bs=$(shell printf "%d" $(CONFIG_MRC_SETTINGS_CACHE_SIZE) ) | \
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tr '\000' '\377' > $@
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cbfs-files-$(CONFIG_CACHE_MRC_SETTINGS) += mrc.cache
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mrc.cache-file := $(obj)/mrc.cache
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mrc.cache-position := $(CONFIG_MRC_SETTINGS_CACHE_BASE)
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mrc.cache-type := mrc_cache
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endif
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