mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
dec279fa30
The code can run on the Mahogany board, which is one of sample boards made by AMD. Its major features are: CPU (only K8 system): * AMD AM2+ * AMD Athlon 64 x2 * AMD Athlon 64 FX * AMD Athlon 64 * AMD Sempron CPUs System Chipset: * RS780E * SB700 On Board Chipset: * BIOS - SPI * Azalia CODEC - Realtek ALC888 * LPC SuperIO - ITE8718F(GX). * LAN - REALTEK 8111C * TPM - SLB9635TT1.2 Main Memory: * DDR II * 4 (Max 4GB) Expansion Slots: * PCI Express X16 slot*2 (PCI-E X8 Bus) * PCI Express X4 Slot*1 Intersil PWM: * Controller - Intersil 6323 2. The ACPI feature is already added. I suggest that firstly we can test the board without the ACPI by setting the HAVE_ACPI_TABLE as 0. With Rev F processor, the HT link can only work in HT1, whose max frequency is 1GHz. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Marc Jones <marcj303@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5220 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
124 lines
4.2 KiB
Text
124 lines
4.2 KiB
Text
#Define gpp_configuration, A=0, B=1, C=2, D=3, E=4(default)
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#Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
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#Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
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# 1: the system allows a PCIE link to be established on Dev2 or Dev3.
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#Define gfx_dual_slot, 0: single slot, 1: dual slot
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#Define gfx_lane_reversal, 0: disable lane reversal, 1: enable
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#Define gfx_tmds, 0: didn't support TMDS, 1: support
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#Define gfx_compliance, 0: didn't support compliance, 1: support
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#Define gfx_reconfiguration, 0: short reconfiguration, 1(default): long reconfiguration
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#Define gfx_link_width, 0: x16, 1: x1, 2: x2, 3: x4, 4: x8, 5: x12 (not supported), 6: x16
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chip northbridge/amd/amdk8/root_complex
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device apic_cluster 0 on
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chip cpu/amd/socket_AM2
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device apic 0 on end
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end
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end
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device pci_domain 0 on
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chip northbridge/amd/amdk8
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device pci 18.0 on # southbridge
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chip southbridge/amd/rs780
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device pci 0.0 on end # HT 0x9600
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device pci 1.0 on end # Internal Graphics P2P bridge 0x9602
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device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603
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device pci 3.0 on end # PCIE P2P bridge 0x960b
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device pci 4.0 on end # PCIE P2P bridge 0x9604
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device pci 5.0 off end # PCIE P2P bridge 0x9605
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device pci 6.0 off end # PCIE P2P bridge 0x9606
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device pci 7.0 off end # PCIE P2P bridge 0x9607
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device pci 8.0 off end # NB/SB Link P2P bridge
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device pci 9.0 on end #
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device pci a.0 on end #
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register "gppsb_configuration" = "1" # Configuration B
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register "gpp_configuration" = "3" # Configuration D default
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register "port_enable" = "0x6fc"
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register "gfx_dev2_dev3" = "1"
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register "gfx_dual_slot" = "1"
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register "gfx_lane_reversal" = "0"
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register "gfx_tmds" = "0"
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register "gfx_compliance" = "0"
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register "gfx_reconfiguration" = "1"
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register "gfx_link_width" = "0"
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end
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chip southbridge/amd/sb700 # it is under NB/SB Link, but on the same pri bus
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device pci 11.0 on end # SATA
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device pci 12.0 on end # USB
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device pci 12.1 on end # USB
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device pci 12.2 on end # USB
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device pci 13.0 on end # USB
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device pci 13.1 on end # USB
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device pci 13.2 on end # USB
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device pci 14.0 on # SM
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chip drivers/generic/generic #dimm 0-0-0
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device i2c 50 on end
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end
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chip drivers/generic/generic #dimm 0-0-1
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device i2c 51 on end
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end
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chip drivers/generic/generic #dimm 0-1-0
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device i2c 52 on end
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end
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chip drivers/generic/generic #dimm 0-1-1
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device i2c 53 on end
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end
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end # SM
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device pci 14.1 on end # IDE 0x439c
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device pci 14.2 on end # HDA 0x4383
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device pci 14.3 on # LPC 0x439d
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chip superio/ite/it8718f
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device pnp 2e.0 off # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.1 on # Com1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.2 off # Com2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.3 off # Parallel Port
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io 0x60 = 0x378
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irq 0x70 = 7
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end
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device pnp 2e.4 off end # EC
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device pnp 2e.5 on # Keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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end
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device pnp 2e.6 on # Mouse
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irq 0x70 = 12
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end
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device pnp 2e.7 off # GPIO, must be closed for unresolved reason.
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end
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device pnp 2e.8 off # MIDI
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io 0x60 = 0x300
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irq 0x70 = 9
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end
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device pnp 2e.9 off # GAME
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io 0x60 = 0x220
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end
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device pnp 2e.a off end # CIR
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end #superio/ite/it8718f
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end #LPC
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device pci 14.4 on end # PCI 0x4384
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device pci 14.5 on end # USB 2
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register "ide0_enable" = "1"
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register "sata0_enable" = "1"
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register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
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register "hda_viddid" = "0x10ec0882"
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end #southbridge/amd/sb700
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end # device pci 18.0
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device pci 18.0 on end
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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end #northbridge/amd/amdk8
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end #pci_domain
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end #northbridge/amd/amdk8/root_complex
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