switch-coreboot/src
Aaron Durbin da1a0778ab rush: use generic spin table support
With the generic spin table support in place, use that.

BUG=chrome-os-partner:32082
BRANCH=None
TEST=None

Change-Id: I7c9ebd16cd7d5e938e686df2225c612581382983
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: fb0d79f89e27fcd51cc751a94008b3801f5c6d0b
Original-Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Change-Id: Ic9949144ed1e9a952290d50b6726bf5891547896
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/218657
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9087
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-28 07:05:16 +01:00
..
arch arm64: add spin table support 2015-03-28 07:05:13 +01:00
console arm64: Add support for secure monitor 2015-03-28 07:05:09 +01:00
cpu cpu/amd/model_10xxx: Increase preram buffer size to 32k 2015-03-25 17:26:48 +01:00
device PCIe: Revise L1 Sub-State support 2015-03-23 13:11:18 +01:00
drivers drivers: add GIC support 2015-03-28 07:05:03 +01:00
ec chromeec: Add ACPI device for PD MCU and handle related EC host event 2015-03-27 06:30:44 +01:00
include arm64: add spin table support 2015-03-28 07:05:13 +01:00
lib arm64: Add support for secure monitor 2015-03-28 07:05:09 +01:00
mainboard rush: use generic spin table support 2015-03-28 07:05:16 +01:00
northbridge northbridge/amd/amdfam10: Properly implement SLIT generation 2015-03-27 17:07:06 +01:00
soc tegra132: remove private spin table implementation 2015-03-28 07:05:14 +01:00
southbridge CBMEM: Add LATE_CBMEM_INIT guards 2015-03-19 06:17:07 +01:00
superio superio: ite8772f: Exit extemp busy state 2015-03-21 08:44:28 +01:00
vendorcode Chrome OS vendorcode: Fix vboot_reference compilation 2015-03-26 03:07:18 +01:00
Kconfig Enable publishing of board ID where supported 2015-03-23 17:20:24 +01:00