mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
The 'cbmem -1' flag that cuts off console output before the last boot will ignore content from earlier stages if it was truncated due to lack of pre-CBMEM console space. This patch makes the "log truncated" message more specific and adds it as an additional cut-off marker to 'cbmem -1' to counteract that problem. Also raise the log level of the coreboot banner one step to BIOS_NOTICE to make it more likely to be included in the output for 'cbmem -1' to find. (I believe NOTICE is reasonable but I wouldn't want to go as far as WARN which should be reserved for actual problems. Of course this is not ideal, but then again, our whole log-level system really isn't... it would be better if we could make it always print a banner to the CBMEM console without affecting the UART at the same time, but that would require a larger amount of work.) Change-Id: I58288593dfa757e14f4a9da4ffa7e27b0b66feb9 Reported-by: https://ticket.coreboot.org/issues/117 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/19720 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
76 lines
1.7 KiB
C
76 lines
1.7 KiB
C
/*
|
|
* This file is part of the coreboot project.
|
|
*
|
|
* Copyright (C) 2003 Eric Biederman
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation; version 2 of
|
|
* the License.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#include <console/console.h>
|
|
#include <console/uart.h>
|
|
#include <console/streams.h>
|
|
#include <device/pci.h>
|
|
#include <option.h>
|
|
#include <rules.h>
|
|
#include <version.h>
|
|
|
|
/* Mutable console log level only allowed when RAM comes online. */
|
|
#if defined(__PRE_RAM__)
|
|
#define CONSOLE_LEVEL_CONST 1
|
|
#else
|
|
#define CONSOLE_LEVEL_CONST 0
|
|
#endif
|
|
|
|
static int console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
|
|
|
|
static inline int get_log_level(void)
|
|
{
|
|
if (CONSOLE_LEVEL_CONST)
|
|
return CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
|
|
|
|
return console_loglevel;
|
|
}
|
|
|
|
static inline void set_log_level(int new_level)
|
|
{
|
|
if (CONSOLE_LEVEL_CONST)
|
|
return;
|
|
|
|
console_loglevel = new_level;
|
|
}
|
|
|
|
static void init_log_level(void)
|
|
{
|
|
int debug_level = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
|
|
|
|
get_option(&debug_level, "debug_level");
|
|
|
|
set_log_level(debug_level);
|
|
}
|
|
|
|
int console_log_level(int msg_level)
|
|
{
|
|
return (get_log_level() >= msg_level);
|
|
}
|
|
|
|
asmlinkage void console_init(void)
|
|
{
|
|
init_log_level();
|
|
|
|
#if CONFIG_EARLY_PCI_BRIDGE && !defined(__SMM__)
|
|
pci_early_bridge_init();
|
|
#endif
|
|
|
|
console_hw_init();
|
|
|
|
printk(BIOS_NOTICE, "\n\ncoreboot-%s%s %s " ENV_STRING " starting...\n",
|
|
coreboot_version, coreboot_extra_version, coreboot_build);
|
|
}
|