switch-coreboot/src
Ronald G. Minnich d6b16f54b9 Set armv7 up for cpu_info to work as on x86 (so threads can work)
On x86, cpu_info lives at the top of stack. Make the arm do that as
well, as the threading model needs that and so will multicore support.

As part of this change, make the stack size a power of 2.
Also make it much smaller -- 2048 bytes is PLENTY for ram stage.

Note that the small stack size is counterintuitive for rom stage.  How
can this work in rom stage, which needs a HUGE stack for lzma? The
main use of STACK_SIZE has always been in ram stage; since 2002 or so
it was to size per-core stacks (see, e.g.,

src/arch/x86/lib/c_start.S:.space CONFIG_MAX_CPUS*CONFIG_STACK_SIZE

and, more recently, thread stacks. So, we define the STACK_TOP for rom
and ram stage, but the STACK_SIZE has no real effect on the ROM stage
(no hardware red zones on the stack) and hence we're ok with actually
defining the "wrong" stack size. In fact, the coreboot_ram ldscript
for armv7 sizes the stack by subtracting CONFIG_STACK_BOTTOM from
CONFIG_STACK_TOP, so we replicate that arithmetic in bootblock.inc

Observed stack usage in ramstage:
BS: BS_PAYLOAD_LOAD times (us): entry 1 run 153887 exit 1
Jumping to boot code at 23104044
CPU0: stack: 02072800 - 02073000, lowest used address 020728d4, stack used: 1836 bytes
entry    = 23104044

Which means we do need 2K, not 1K.

Change-Id: I1a21db87081597efe463095bfd33c89eba1d569f
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/66135
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Tested-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: Ronald G. Minnich <rminnich@chromium.org>
(cherry picked from commit f011097e9f2bfb2f4c1109d465be89a79a65ba3e)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6501
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-08-06 22:07:06 +02:00
..
arch Set armv7 up for cpu_info to work as on x86 (so threads can work) 2014-08-06 22:07:06 +02:00
console src/console/Kconfig: Fix choice for showing POST codes on console 2014-07-30 20:34:08 +02:00
cpu Set armv7 up for cpu_info to work as on x86 (so threads can work) 2014-08-06 22:07:06 +02:00
device device/oprom/realmode/x86.c: Move includes to top of file 2014-07-30 23:39:04 +02:00
drivers x230: Deploy VBT 2014-07-29 01:34:09 +02:00
ec chrome ec: Add Methods for new EC events 2014-08-04 09:32:22 +02:00
include timer: Add functions to initialize absolute timer structures. 2014-07-31 18:32:52 +02:00
lib lib: Trivial - drop trailing blank lines at EOF 2014-07-08 13:52:15 +02:00
mainboard lenovo/x201: Enable pcie lanes in wwan slot. 2014-08-06 20:51:48 +02:00
northbridge northbridge/via/vx800: Fix out-of-bounds read due to off-by-one 2014-08-05 02:12:20 +02:00
soc tegra124: Add a stub implementation of the tegra124 SOC. 2014-08-05 18:44:53 +02:00
southbridge intel/fsp_bd82x6x: Fix cycle error 2014-08-03 15:19:28 +02:00
superio superio/f71869ad: fix documentation of io_info mask values 2014-07-18 20:00:06 +02:00
vendorcode vendorcode/intel/fsp/rangeley/include: Missing 'fsptypes.h' 2014-08-01 02:41:18 +02:00
Kconfig src/.../Kconfig: various small fixes to texts 2014-07-23 09:07:47 +02:00