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https://github.com/fail0verflow/switch-coreboot.git
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cc393085fb
Without this change inteltool cannot read BIOS_CNTL values nor can it read the SPIBAR values. BUG=None BRANCH=None TEST=None Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17979 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Change-Id: I9ff16e060aca66e3cb11c8315a6843ccecd1d3c2 Reviewed-on: https://chromium-review.googlesource.com/425277 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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| .. | ||
| ahci.c | ||
| amb.c | ||
| cpu.c | ||
| gfx.c | ||
| gpio.c | ||
| inteltool.8 | ||
| inteltool.c | ||
| inteltool.h | ||
| ivy_memory.c | ||
| Makefile | ||
| memory.c | ||
| pcie.c | ||
| powermgt.c | ||
| rootcmplx.c | ||
| spi.c | ||