mirror of
https://github.com/fail0verflow/switch-coreboot.git
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other stages, give it 16k instead of 8 Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@106 f3766cd6-281f-0410-b1cd-43a5c92072e9
150 lines
5.7 KiB
Makefile
150 lines
5.7 KiB
Makefile
##
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## This file is part of the LinuxBIOS project.
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##
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## Copyright (C) 2006-2007 coresystems GmbH
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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INITCFLAGS := $(CFLAGS) -I$(src)/include/cpu/generic/x86 -I$(src)/include \
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-fno-builtin
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SILENT := &> /dev/null
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# Build the final ROM image
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#
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# These are the main linuxbios components. Do not change the order unless you
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# know exactly what you are doing.
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#
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LINUXBIOS_COMPONENTS := linuxbios.lar linuxbios.vpd stage0.init
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$(obj)/linuxbios.rom: $(patsubst %,$(obj)/%,$(LINUXBIOS_COMPONENTS))
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$(Q)cat $^ > $@
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#
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# LinuxBIOS v3 is completely modular and based on a very small startup
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# code (stage0) plus a LAR archive. The LAR archive may contain any number
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# of stages, payloads and option roms.
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#
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# Build the LAR archive:
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#
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$(obj)/linuxbios.lar: $(obj)/util/lar/lar lzma $(obj)/linuxbios.initram $(obj)/linuxbios.stage2 payload
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$(Q)echo "Building LinuxBIOS archive..."
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$(Q)rm -rf $(obj)/lar.tmp
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$(Q)mkdir $(obj)/lar.tmp
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$(Q)mkdir $(obj)/lar.tmp/normal
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$(Q)cp $(obj)/linuxbios.initram $(obj)/lar.tmp/normal/initram
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$(Q)cp $(obj)/linuxbios.stage2 $(obj)/lar.tmp/normal/stage2
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$(Q)cd $(obj)/lar.tmp && ../util/lar/lar c ../linuxbios.lar.pre normal/initram normal/stage2
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# TODO: dynamically pad the lar archive. bs is image size - bootblock size (8k)
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$(Q)dd if=$(obj)/linuxbios.lar.pre of=$(obj)/linuxbios.lar \
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bs=245760 count=1 conv=sync $(SILENT)
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#
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# LinuxBIOS stage0. This is the LinuxBIOS "boot block code".
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# It enables Cache-as-RAM and parses the LAR archive for an
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# initram module and the various stages and payload files.
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#
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$(obj)/stage0.init:
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$(Q)echo "Building stage0.init"
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$(Q)# Building asm stub
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$(Q)$(CC) -E $(LINUXBIOSINCLUDE) $(src)/arch/x86/stage0_i586.S -o $(obj)/stage0_i586.s -DBOOTBLK=0x1f00 -DRESRVED=0xf0 -DDATE=\"`date +%Y/%m/%d`\"
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$(Q)$(AS) $(obj)/stage0_i586.s -o $(obj)/stage0_i586.o
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$(Q)# Building cachemain
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/arch/x86/cachemain.c -o $(obj)/cachemain.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/lib/lar.c -o $(obj)/lar.o
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$(Q)# console lib
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/arch/x86/console.c -o $(obj)/console.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/arch/x86/serial.c -o $(obj)/serial.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/arch/x86/archelfboot.c -o $(obj)/archelfboot.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/console/vtxprintf.c -o $(obj)/vtxprintf.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/console/vsprintf.c -o $(obj)/vsprintf.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/lib/uart8250.c -o $(obj)/uart8250.o
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$(Q)# other lib parts
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/lib/mem.c -o $(obj)/mem.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/lib/elfboot.c -o $(obj)/elfboot.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/lib/compute_ip_checksum.c -o $(obj)/compute_ip_checksum.o
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$(Q)cd $(obj); $(CC) -m32 -nostdlib -static \
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-T $(src)/arch/x86/ldscript.ld cachemain.o \
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console.o uart8250.o serial.o archelfboot.o vtxprintf.o \
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vsprintf.o lar.o elfboot.o compute_ip_checksum.o mem.o stage0_i586.o -o stage0.o
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$(Q)objcopy -O binary $(obj)/stage0.o $(obj)/stage0.init.pre
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# Pad boot block to 0x4000 - 0x100
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# we will probably remove this step -- not needed if we continue with ldscript.ld
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$(Q)dd if=$(obj)/stage0.init.pre of=$(obj)/stage0.init \
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bs=16128 conv=sync $(SILENT)
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$(Q)echo "Len: `wc -c < $(obj)/stage0.init.pre`"
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$(Q)test `wc -c < $(obj)/stage0.init.pre` -gt 16128 && echo "Error. Bootblock got too big" || true
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#
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# This is the rest of linuxbios (v2: linuxbios_ram.rom)
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# Is this maybe platform independent, except for the "drivers"?
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# Where should it be built, maybe in device/ ?
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#
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# TODO: This should be compressed with the default compressor
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#
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$(obj)/linuxbios.stage2: $(obj)/stage0.init $(obj)/statictree.o
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$(Q)echo "Building linuxbios.stage2"
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$(Q)# main
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/lib/stage2.c -o $(obj)/stage2.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/device/device.c -o $(obj)/device.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/device/device_util.c -o $(obj)/device_util.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/device/root_device.c -o $(obj)/root_device.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/lib/mem.c -o $(obj)/mem.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/lib/malloc.c -o $(obj)/malloc.o
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$(Q)$(CC) $(INITCFLAGS) -c $(src)/lib/clog2.c -o $(obj)/clog2.o
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$(Q)$(CC) $(INITCFLAGS) -c -I$(src) $(obj)/statictree.c -o $(obj)/statictree.o
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$(Q)$(CC) $(INITCFLAGS) -c mainboard/$(MAINBOARDDIR)/mainboard.c -o $(obj)/mainboard.o
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$(Q)# leave a .o with full symbols in it for debugging.
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$(Q)cd $(obj); $(LD) -R $(obj)/stage0.o -Ttext 0x1000 \
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-o $(obj)/linuxbios.stage2.o stage2.o device.o \
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device_util.o root_device.o elfboot.o compute_ip_checksum.o mem.o malloc.o clog2.o mainboard.o \
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statictree.o
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$(Q)objcopy -O binary $(obj)/linuxbios.stage2.o $(obj)/linuxbios.stage2
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$(Q)chmod 644 $(obj)/linuxbios.stage2
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#
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# The payload as we love it. Get it from somewhere.
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# Is this a place to incorporate buildrom?
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#
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# TODO: This is not implemented yet.
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# TODO: This needs to be compressed with the default compressor
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#
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payload:
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$(Q)echo "Building payload... skipped"
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