mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
ca250d0628
we will switch index1 when we finish ddr initialization, and will check some status in this setp, we will reset the system if we don't get the right status during 100ms, we also will reset system if training error happen in index1. BUG=chrome-os-partner:57988 BRANCH=None TEST=reset in coreboot, and never happen it again Change-Id: Id6e8936d90e54b733ac327f8476d744b45639232 Signed-off-by: Lin Huang <hl@rock-chips.com> Reviewed-on: https://chromium-review.googlesource.com/399681 Reviewed-by: Julius Werner <jwerner@chromium.org> |
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| .. | ||
| acpi | ||
| arch | ||
| commonlib | ||
| console | ||
| cpu | ||
| device | ||
| drivers | ||
| ec | ||
| include | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| soc | ||
| southbridge | ||
| superio | ||
| vboot | ||
| vendorcode | ||
| Kconfig | ||