Lee Leahy 4dfaac71f1 UPSTREAM: soc/intel/quark: Pass in the memory initialization parameters ... Specify the memory initialization parameters in mainboard/intel/galileo/devicetree.cb. Pass these values into FSP to initialize memory. TEST=Build and run on Galileo Gen2 BUG=None BRANCH=None TEST=None Change-Id: I83ee196f5fb825118a3a74b61f73f3728a1a1dc6 Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/15260 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/359317 Reviewed-by: Furquan Shaikh <furquan@chromium.org>		2016-07-09 01:40:13 -07:00
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Board	UPSTREAM: soc/intel/quark: Pass in the memory initialization parameters	2016-07-09 01:40:13 -07:00
SoC	UPSTREAM: Documentation/Intel: Update the documentation	2016-05-26 03:21:32 -07:00
development.html	Documentation: x86 MTRR setup, TempRamExit and MTRR loading	2016-03-21 20:12:35 +01:00
fsp1_1.html	UPSTREAM: Documentation/Intel: Update the documentation	2016-05-26 03:21:32 -07:00
index.html	UPSTREAM: Documentation/Intel: Add feature documentation table	2016-07-09 01:40:09 -07:00