mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
c4a4116440
secondary controller was ok). There were two problems: the master sata controller was not being initialized, and the irqs for the secondary ports on both controllers were not being set in the mptable. Thanks for Jonathan Kollasch for all the help figuring out the IRQ problem. While all ports work reliably under a recent kernel (2.6.24), sata is about half as fast as under the proprietary bios, according to bonnie++. That still needs fixing... Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3253 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 |
||
|---|---|---|
| .. | ||
| arch | ||
| boot | ||
| config | ||
| console | ||
| cpu | ||
| devices | ||
| drivers | ||
| include | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| pc80 | ||
| pmc/altimus/mpc7410 | ||
| ram | ||
| sdram | ||
| southbridge | ||
| stream | ||
| superio | ||