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switch-coreboot/src/southbridge
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Stefan Reinauer c3d15a7210 Intel common SPI: Fix compilation breakage from refactoring 
When the Intel SPI drivers were refactored, compilation for Chrome OS
devices broke, because ELOG uses the SPI driver in SMM.

Change-Id: If2b2da5d526196ed742e17409b01a381417d0ce8
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/8701
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-17 04:55:52 +01:00
..
amd x86 SMM: Replace weak prototypes with weak function stub 2015-03-11 18:15:22 +01:00
broadcom x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
dmp southbridge/dmp/vortex86ex/southbridge.c: Silence bitwise op warns 2014-12-07 21:11:58 +01:00
intel Intel common SPI: Fix compilation breakage from refactoring 2015-03-17 04:55:52 +01:00
nvidia nvidia/ck804: Minor cleanup on dead code 2015-02-16 23:14:18 +01:00
rdc southbridge: Trivial - drop trailing blank lines at EOF 2014-07-08 13:53:21 +02:00
ricoh southbridge/ricoh: Spelling fixes 2014-12-17 16:54:03 +01:00
sis x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
ti southbridge/ricoh,ti: Remove trailing whitespace in debug output 2014-08-10 08:27:41 +02:00
via x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer 2015-02-15 08:50:22 +01:00
Kconfig Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00
Makefile.inc Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00