switch-coreboot/src
Patrick Rudolph bec669685c nb/intel/sandybridge/raminit: Fix CAS Write Latency
As documented in DDR3 spec for MR2 the CWL is based on DDR frequency.
There's no to little difference for most memory modules operating at DDR3-1333.

It might fix problems for memory modules that operate at a higher frequency and
memory modules with low CL values should work even better.

Tested on Lenovo T420 with DDR3-1333 CL9 and DDR3-1600 CL11.
No regressions found.

Change-Id: Ib90b5de872a219cf80b4976b6dfae6bc02e298f4
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/17389
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-11-20 14:59:59 +01:00
..
acpi src/acpi: Capitalize ACPI and SATA 2016-07-31 19:25:40 +02:00
arch arch/x86 GDT: Fix orphan debug output 2016-11-20 03:10:32 +01:00
commonlib commonlib/include: remove NEED_VB20_INTERNALS 2016-11-19 16:57:27 +01:00
console Revert "[WIP] console/Kconfig: Calculate COM port base addresses only on x86" 2016-10-18 18:41:16 +02:00
cpu intel car: Move pre-ram stack guard lower 2016-11-20 03:10:06 +01:00
device Kconfig: Update default hex values to start with 0x 2016-10-02 19:08:15 +02:00
drivers intel post-car: Increase stacktop alignment 2016-11-18 20:59:12 +01:00
ec ec/lenovo/h8: Add USB Always On 2016-11-18 18:14:42 +01:00
include rtc: Check update-in-progress bit 2016-11-17 23:08:43 +01:00
lib intel post-car: Increase stacktop alignment 2016-11-18 20:59:12 +01:00
mainboard ec/lenovo/h8: Add USB Always On 2016-11-18 18:14:42 +01:00
northbridge nb/intel/sandybridge/raminit: Fix CAS Write Latency 2016-11-20 14:59:59 +01:00
soc soc/intel/common/lpss_i2c: correct bus speed error 2016-11-19 16:56:23 +01:00
southbridge sb/lynxpoint: use hda_verb.c from VARIANT_DIR if applicable 2016-11-18 20:45:49 +01:00
superio sio/it8772f: add GPIO blink definition needed by google/tricky 2016-11-18 20:28:55 +01:00
vboot commonlib/include: remove NEED_VB20_INTERNALS 2016-11-19 16:57:27 +01:00
vendorcode google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
Kconfig ACPI S3: Remove HIGH_MEMORY_SAVE where possible 2016-11-09 20:52:07 +01:00