Patrick Georgi b9eee8e468 lenovo/x60: Fetch 16 bits when trying to parse bit 13 ... I'm not sure if that's the right fix here, but assuming the bit mask is right, the inb is wrong. Change-Id: I7e33019af088780a09be12513200bec63734bf97 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Found-by: Coverity Scan #1229556 Reviewed-on: https://review.coreboot.org/16026 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexander Couzens <lynxis@fe80.eu>		2016-08-03 22:53:21 +02:00
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acpi	src/acpi: Capitalize ACPI and SATA	2016-07-31 19:25:40 +02:00
arch	ACPI: Add code to create root port entry in DMAR table	2016-08-03 06:24:17 +02:00
commonlib	cbmem: share additional time stamps IDs	2016-07-20 22:09:24 +02:00
console	arch/x86: Enable postcar console	2016-08-01 21:40:23 +02:00
cpu	Remove non-ascii & unprintable characters	2016-08-01 21:44:45 +02:00
device	src/device: Capitalize CPU, RAM and ROM	2016-07-31 18:33:30 +02:00
drivers	spi/tpm: read TPM version in larger chunks	2016-08-03 20:07:40 +02:00
ec	Remove non-ascii & unprintable characters	2016-08-01 21:44:45 +02:00
include	elog: Include declarations for boot count functions unconditionally	2016-08-02 18:37:55 +02:00
lib	Remove non-ascii & unprintable characters	2016-08-01 21:44:45 +02:00
mainboard	lenovo/x60: Fetch 16 bits when trying to parse bit 13	2016-08-03 22:53:21 +02:00
northbridge	amd/amdfam10: eliminate dead code	2016-08-02 14:02:51 +02:00
soc	google/gale: Add more board ID variants	2016-08-03 18:23:47 +02:00
southbridge	sb/amd/sb[6|7|8]00: Initialize PIC	2016-08-03 22:08:01 +02:00
superio	superio/fintek/f81866d: Add support for UART 3/4	2016-08-02 18:57:36 +02:00
vboot	src/vboot: Capitalize RAM and CPU	2016-07-31 19:31:41 +02:00
vendorcode	chromeos mainboards: remove chromeos.asl	2016-07-30 01:36:32 +02:00
Kconfig	src/Kconfig: Capitalize ROM	2016-07-31 18:34:16 +02:00