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b6924ac9cd
These non-ascii & unprintable characters aren't needed. BUG=None BRANCH=None TEST=None Change-Id: Ic5073304d3c8e6452ec072ecece036beac26323a Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/15977 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://chromium-review.googlesource.com/366302 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org>
257 lines
7.8 KiB
C
257 lines
7.8 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <arch/io.h>
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#include <cpu/x86/msr.h>
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#include <cpu/amd/mtrr.h>
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#include <device/pci_def.h>
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#include <southbridge/amd/sb600/sb600.h>
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#include <superio/ite/it8712f/it8712f.h>
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#include "tn_post_code.h"
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#include "vgabios.h"
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#define ADT7461_ADDRESS 0x4C
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#define ARA_ADDRESS 0x0C /* Alert Response Address */
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#define SMBUS_IO_BASE 0x1000
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/* Video BIOS Function Extensions Specification
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*/
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//Callback Sub-Function 00h - Get LCD Panel ID
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#define LCD_PANEL_ID_NO 0x00 /* No LCD */
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#define LCD_PANEL_ID_01 0x01 /* 1024x768, 24 bits, 1 channel */
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#define LCD_PANEL_ID_02 0x02 /* 1280x1024, 24 bits, 2 channels */
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#define LCD_PANEL_ID_03 0x03 /* 1440x900, 24 bits, 2 channels */
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#define LCD_PANEL_ID_04 0x04 /* 1680x1050, 24 bits, 2 channels */
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#define LCD_PANEL_ID_05 0x05 /* 1920x1200, 24 bits, 2 channels */
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#define LCD_PANEL_ID_06 0x06 /* 1920x1080, 24 bits, 2 channels */
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//Callback Sub-Function 05h - Select Boot-up TV Standard
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#define TV_MODE_00 0x00 /* NTSC */
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#define TV_MODE_01 0x01 /* PAL */
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#define TV_MODE_02 0x02 /* PALM */
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#define TV_MODE_03 0x03 /* PAL60 */
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#define TV_MODE_04 0x04 /* NTSCJ */
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#define TV_MODE_05 0x05 /* PALCN */
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#define TV_MODE_06 0x06 /* PALN */
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#define TV_MODE_09 0x09 /* SCART-RGB */
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#define TV_MODE_NO 0xff /* No TV Support */
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/* The base address is 0x2e or 0x4e, depending on config bytes. */
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#define SIO_BASE 0x2e
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#define SIO_INDEX SIO_BASE
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#define SIO_DATA SIO_BASE+1
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/* Global configuration registers. */
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#define IT8712F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
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#define IT8712F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
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#define IT8712F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */
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#define IT8712F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */
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#define IT8712F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. */
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#define IT8712F_CONFIG_REG_MFC 0x2a /* Multi-function control */
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#define IT8712F_CONFIG_REG_WATCHDOG 0x72 /* Watchdog control. */
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#define IT8712F_CONFIGURATION_PORT 0x2e /* Write-only. */
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#define IT8712F_SIMPLE_IO_BASE 0x200 /* Simple I/O base address */
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int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address);
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int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address, u8 val);
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#define ADT7461_read_byte(address) \
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do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address)
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#define ARA_read_byte(address) \
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do_smbus_read_byte(SMBUS_IO_BASE, ARA_ADDRESS, address)
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#define ADT7461_write_byte(address, val) \
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do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
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/* The content of IT8712F_CONFIG_REG_LDN (index 0x07) must be set to the
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LDN the register belongs to, before you can access the register. */
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static void it8712f_sio_write(uint8_t ldn, uint8_t index, uint8_t value)
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{
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outb(IT8712F_CONFIG_REG_LDN, SIO_BASE);
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outb(ldn, SIO_DATA);
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outb(index, SIO_BASE);
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outb(value, SIO_DATA);
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}
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static void it8712f_enter_conf(void)
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{
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/* Enter the configuration state (MB PnP mode). */
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/* Perform MB PnP setup to put the SIO chip at 0x2e. */
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/* Base address 0x2e: 0x87 0x01 0x55 0x55. */
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/* Base address 0x4e: 0x87 0x01 0x55 0xaa. */
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outb(0x87, IT8712F_CONFIGURATION_PORT);
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outb(0x01, IT8712F_CONFIGURATION_PORT);
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outb(0x55, IT8712F_CONFIGURATION_PORT);
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outb(0x55, IT8712F_CONFIGURATION_PORT);
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}
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static void it8712f_exit_conf(void)
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{
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/* Exit the configuration state (MB PnP mode). */
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it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02);
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}
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/* set thermal config
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*/
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static void set_thermal_config(void)
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{
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u8 byte;
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u16 word;
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device_t sm_dev;
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/* set ADT 7461 */
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ADT7461_write_byte(0x0B, 0x50); /* Local Temperature Hight limit */
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ADT7461_write_byte(0x0C, 0x00); /* Local Temperature Low limit */
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ADT7461_write_byte(0x0D, 0x50); /* External Temperature Hight limit High Byte */
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ADT7461_write_byte(0x0E, 0x00); /* External Temperature Low limit High Byte */
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ADT7461_write_byte(0x19, 0x55); /* External THERM limit */
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ADT7461_write_byte(0x20, 0x55); /* Local THERM limit */
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byte = ADT7461_read_byte(0x02); /* read status register to clear it */
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ARA_read_byte(0x05); /* A hardware alert can only be cleared by the master sending an ARA as a read command */
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printk(BIOS_INFO, "Init adt7461 end , status 0x02 %02x\n", byte);
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/* sb600 settings for thermal config */
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/* set SB600 GPIO 64 to GPIO with pull-up */
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byte = pm2_ioread(0x42);
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byte &= 0x3f;
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pm2_iowrite(0x42, byte);
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/* set GPIO 64 to input */
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sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
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word = pci_read_config16(sm_dev, 0x56);
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word |= 1 << 7;
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pci_write_config16(sm_dev, 0x56, word);
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/* set GPIO 64 internal pull-up */
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byte = pm2_ioread(0xf0);
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byte &= 0xee;
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pm2_iowrite(0xf0, byte);
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/* set Talert to be active low */
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byte = pm_ioread(0x67);
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byte &= ~(1 << 5);
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pm_iowrite(0x67, byte);
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/* set Talert to generate ACPI event */
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byte = pm_ioread(0x3c);
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byte &= 0xf3;
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pm_iowrite(0x3c, byte);
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/* THERMTRIP pin */
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/* byte = pm_ioread(0x68);
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* byte |= 1 << 3;
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* pm_iowrite(0x68, byte);
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*
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* byte = pm_ioread(0x55);
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* byte |= 1 << 0;
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* pm_iowrite(0x55, byte);
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*
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* byte = pm_ioread(0x67);
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* byte &= ~( 1 << 6);
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* pm_iowrite(0x67, byte);
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*/
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}
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/* Mainboard specific GPIO setup. */
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static void mb_gpio_init(u16 *iobase)
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{
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/* Init Super I/O GPIOs. */
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it8712f_enter_conf();
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outb(IT8712F_CONFIG_REG_LDN, SIO_INDEX);
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outb(IT8712F_GPIO, SIO_DATA);
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outb(0x62, SIO_INDEX);
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outb((*iobase >> 8), SIO_DATA);
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outb(0x63, SIO_INDEX);
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outb((*iobase & 0xff), SIO_DATA);
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it8712f_exit_conf();
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}
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#if CONFIG_VGA_ROM_RUN
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/* The LCD's panel id seletion. */
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static void lcd_panel_id(rs690_vbios_regs *vbios_regs, u8 num_id)
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{
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switch (num_id) {
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case 0x1:
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vbios_regs->int15_regs.fun00_panel_id = LCD_PANEL_ID_01;
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break;
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case 0x2:
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vbios_regs->int15_regs.fun00_panel_id = LCD_PANEL_ID_02;
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break;
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case 0x3:
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vbios_regs->int15_regs.fun00_panel_id = LCD_PANEL_ID_03;
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break;
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case 0x4:
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vbios_regs->int15_regs.fun00_panel_id = LCD_PANEL_ID_04;
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break;
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case 0x5:
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vbios_regs->int15_regs.fun00_panel_id = LCD_PANEL_ID_05;
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break;
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case 0x6:
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vbios_regs->int15_regs.fun00_panel_id = LCD_PANEL_ID_06;
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break;
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default:
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vbios_regs->int15_regs.fun00_panel_id = LCD_PANEL_ID_NO;
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break;
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}
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}
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#endif
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/*************************************************
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* enable the dedicated function in tim5690 board.
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* This function called early than rs690_enable.
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*************************************************/
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static void mainboard_enable(device_t dev)
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{
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u16 gpio_base = IT8712F_SIMPLE_IO_BASE;
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#if CONFIG_VGA_ROM_RUN
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rs690_vbios_regs vbios_regs;
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u8 port2;
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#endif
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printk(BIOS_INFO, "Mainboard tim5690 Enable. dev=0x%p\n", dev);
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mb_gpio_init(&gpio_base);
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#if CONFIG_VGA_ROM_RUN
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/* The LCD's panel id seletion by switch. */
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port2 = inb(gpio_base+1);
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lcd_panel_id(&vbios_regs, ((~port2) & 0xf));
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/* No support TV */
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vbios_regs.int15_regs.fun05_tv_standard = TV_MODE_NO;
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vgabios_init(&vbios_regs);
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#endif
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set_thermal_config();
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}
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void mainboard_post(u8 value)
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{
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switch (value) {
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case POST_ENTER_ELF_BOOT:
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technexion_post_code(LED_MESSAGE_FINISH);
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break;
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}
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}
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struct chip_operations mainboard_ops = {
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.enable_dev = mainboard_enable,
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};
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