mirror of
https://github.com/fail0verflow/switch-coreboot.git
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b520f3201e
Also added comments.
A big change is in the dts. In OFW trees, the hierarchy seems to be:
/root/cpu/northbridge
south
other pci
note that the north is in the hierarchy under the south. This hierarchy
makes no sense on systems with a shared frontside bus, or at least I
don't see how it can. In those systems, it's easier to think about
the CPUs AND northbridges as children of the front side bus.
in LinuxBIOS, it has always been this:
/root/cpu/whatever
/root/northbridge/
south
other pci
There have been many discussions over how it ought to be, for 8 years
now, and we've always come back to how LB does it. So I have changed the
dts for qemu for now to match LB's way of doing things. Note that the
new system is flexible enough that, on K8, we CAN do things as above:
/cpu@0/amd8knorthbridge/etc.
/cpu@1/amd8knorthbridge/etc.
But on qemu, for now, the root is the mainboard, and the CPU and
northbridge are siblings.
I've added some informational printks, cleaned up pci_ops, and done
other things so that it builds and all seems to work -- until it hangs
hard in enumeration in i440bx ...
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@160 f3766cd6-281f-0410-b1cd-43a5c92072e9
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| .. | ||
| console | ||
| cpu/generic/x86 | ||
| device | ||
| elf.h | ||
| elf_boot.h | ||
| lar.h | ||
| lib.h | ||
| linuxbios_tables.h | ||
| string.h | ||
| tables.h | ||
| uart8250.h | ||