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https://github.com/fail0verflow/switch-coreboot.git
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6d38e04683
such as .note.this.that. These new note names were making builds unbuildable on (e.g.) fc9. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@873 f3766cd6-281f-0410-b1cd-43a5c92072e9
58 lines
1.3 KiB
Text
58 lines
1.3 KiB
Text
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
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OUTPUT_ARCH(i386)
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/*
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ENTRY(_start)
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*/
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BOOTBLOCK_SIZE = 20480;
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TARGET(binary)
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SECTIONS
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{
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. = 0 - BOOTBLOCK_SIZE + 256; /* leave space for vpd */
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.stage0_1 . : {
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_stage0_1 = .;
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*(.text);
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*(.data);
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*(.bss);
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*(.rodata.*)
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*(.rodata)
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_estage0_1 = .;
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}
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/DISCARD/ : {
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*(.comment)
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*(.note)
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*(.note.*)
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}
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}
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SECTIONS {
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_ROMTOP = 0xfffffff0;
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. = _ROMTOP;
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.resetvector . : {
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*(.reset)
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}
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}
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