Patrick Georgi ac624a638d Crank up CPU speed on Intel Core and Core2 CPUs ... The CPUs start on their slowest speed, and were left that way by coreboot. This change will speed up coreboot a bit, as well as systems that don't change the clock for whatever reason. Change-Id: Ia6225eea97299a473cf50eccc6c5e7de830b1ddc Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/176 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2011-09-09 11:40:30 +02:00
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arch/x86	Add automatic SMBIOS table generation	2011-08-26 20:08:52 +02:00
boot	more ifdef -> if fixes.	2011-04-21 21:26:58 +00:00
console	Add support for the tracing infastructure in coreboot.	2011-09-07 01:26:47 +02:00
cpu	Crank up CPU speed on Intel Core and Core2 CPUs	2011-09-09 11:40:30 +02:00
devices	more ifdef -> if fixes	2011-04-21 20:45:45 +00:00
drivers	Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an	2011-04-26 23:47:04 +00:00
ec	Lenovo H8: Always clear audio mute	2011-08-19 14:17:06 +02:00
include	Add support for the tracing infastructure in coreboot.	2011-09-07 01:26:47 +02:00
lib	Add support for the tracing infastructure in coreboot.	2011-09-07 01:26:47 +02:00
mainboard	AMD SB800 southbridge update	2011-09-07 01:10:05 +02:00
northbridge	Report GSE chipset and warn if the code has been compiled for the wrong chipset.	2011-09-09 11:40:04 +02:00
pc80	X60: trigger save cmos on volume/brightness change	2011-06-15 08:51:18 +02:00
southbridge	AMD SB800 southbridge update	2011-09-07 01:10:05 +02:00
superio	Do not compile nuvoton superio for all board	2011-08-09 20:11:01 +02:00
vendorcode	AMD SB800 southbridge update	2011-09-07 01:10:05 +02:00
Kconfig	Add support for the tracing infastructure in coreboot.	2011-09-07 01:26:47 +02:00
Kconfig.deprecated_options	some ifdef --> if fixes	2011-04-21 20:24:43 +00:00