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These values were originally hard-coded in the AMD MCT wrapper. Change-Id: I12056d38d5348e70a44c192385e22e715e207792 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/8454 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
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293 B
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12 lines
No EOL
293 B
Text
baud_rate = 115200
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debug_level = Alert
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multi_core = Enable
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slow_cpu = off
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max_mem_clock = DDR2-800
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ECC_memory = Enable
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ECC_redirection = Disable
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ecc_scrub_rate = 1.28us
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interleave_chip_selects = Enable
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interleave_nodes = Disable
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interleave_memory_channels = Enable
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power_on_after_fail = Enable |