Alexandru Gagniuc a63398059b soc/apollolake/pmutil: Get PMC base address dynamically ... Instead of using a hardcoded address for PMC device BAR0, read it dynamically. This allows the allocator to move the BAR without needing a fixed resource. Note that we cannot do the same for the ACPI BAR (index 0x20), as it cannot be read back. Change-Id: If43e1ccb693ffb17b78bdd76140a0849493a0010 Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com> Reviewed-on: https://review.coreboot.org/14633 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-05-09 18:35:01 +02:00
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acpi	soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds	2016-04-28 05:47:30 +02:00
bootblock	Revert "soc/intel/apollolake: Enable LPC bus interface"	2016-05-06 18:54:49 +02:00
include/soc	soc/apollolake/lpc_lib: Add utility to configure LPC pads	2016-05-06 18:56:22 +02:00
acpi.c	soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds	2016-04-28 05:47:30 +02:00
car.c	soc/intel/apollolake: Flush L1D to L2 only if loaded segment is in CAR	2016-04-22 17:27:34 +02:00
chip.c	soc/intel/apollolake: Add handling of GNVS ACPI entry for CHROMEOS builds	2016-04-28 05:47:30 +02:00
chip.h	soc/apollolake/lpc: Allow configuring SERIRQ via devicetree	2016-05-06 18:58:31 +02:00
cpu.c	soc/intel/apollolake: convert to using common MP init	2016-05-06 16:43:56 +02:00
exit_car.S	soc/intel/apollolake: utilize postcar phase/stage	2016-03-23 14:24:44 +01:00
gpio.c	soc/intel: Update license headers	2016-04-14 16:54:33 +02:00
Kconfig	xip: Do not pass --xip for early stages if CAR supports code execution	2016-05-09 05:01:58 +02:00
lpc.c	soc/apollolake/lpc: Allow configuring SERIRQ via devicetree	2016-05-06 18:58:31 +02:00
lpc_lib.c	soc/apollolake/lpc_lib: Add utility to configure LPC pads	2016-05-06 18:56:22 +02:00
Makefile.inc	soc/apollolake/lpc: Open I/O to LPC based on resource allocation	2016-05-06 18:55:32 +02:00
memmap.c	soc/intel: Update license headers	2016-04-14 16:54:33 +02:00
mmap_boot.c	soc/intel: Update license headers	2016-04-14 16:54:33 +02:00
northbridge.c	soc/intel/apollolake: fix incorrect bdsm -> tolud memory resources	2016-05-06 16:50:27 +02:00
placeholders.c	soc/intel: Update license headers	2016-04-14 16:54:33 +02:00
pmc.c	soc/apollolake: Prevent PMC BAR reassignment during resource allocation	2016-04-30 02:34:29 +02:00
pmutil.c	soc/apollolake/pmutil: Get PMC base address dynamically	2016-05-09 18:35:01 +02:00
romstage.c	soc/intel/apollolake: Correct PCI write size in romstage	2016-05-06 06:52:28 +02:00
spi.c	soc/intel: Update license headers	2016-04-14 16:54:33 +02:00
tsc_freq.c	soc/intel: Update license headers	2016-04-14 16:54:33 +02:00
uart.c	soc/intel: Update license headers	2016-04-14 16:54:33 +02:00
uart_early.c	intel/apollolake: Fix whitespace issues	2016-04-16 01:52:43 +02:00