mirror of
https://github.com/fail0verflow/switch-coreboot.git
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a4b90bacf4
mainboard-name naming has been postponed because it's not clear what the real name should be. Generated code is identical to the state before the patch. Compile tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://coreboot.org/repository/coreboot-v3@694 f3766cd6-281f-0410-b1cd-43a5c92072e9
117 lines
3.3 KiB
Text
117 lines
3.3 KiB
Text
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* Leave this in until we know how to do it in dts. */
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/*
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chip southbridge/amd/cs5536_lx
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register "enable_ide_nand_flash" = "0"
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register "isa_irq" = "0"
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#register "flash_irq" = "14"
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## IDE IRQ
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register "enable_ide_irq" = "0"
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register "audio_irq" = "5"
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register "usb_irq" = "7"
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register "uart0_irq" = "0"
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register "uart1_irq" = "4"
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## PCI INTA ... INTD and their GPIO pins
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## int==0: disable
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register "pci_int[0]" = "0"
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register "pci_int[1]" = "10"
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register "pci_int[2]" = "0"
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register "pci_int[3]" = "0"
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register "pci_int_pin[0]" = "0"
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register "pci_int_pin[1]" = "7"
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register "pci_int_pin[2]" = "0"
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register "pci_int_pin[3]" = "0"
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# Keyboard Emulation Logic IRQs
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# Enable keyboard IRQ2
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register "enable_kel_keyb_irq" = "0"
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# Enable mouse IRQ12
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register "enable_kel_mouse_irq" = "0"
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# Configure KEL Emulation IRQ, 0 to disable
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register "kel_emul_irq" = "0"
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device pci f.0 on end # ISA Bridge
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device pci f.1 on end # Flash controller
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device pci f.2 off end # IDE controller
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device pci f.3 on end # Audio
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device pci f.4 on end # OHCI
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device pci f.5 on end # EHCI
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device pci f.6 off end # UDC controller
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device pci f.7 off end # OTG controller
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end
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# chip drivers/pci/rtl8139
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## device pci d.0 on end # Realtek LAN
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# register "nic_irq" = "10"
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# end
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end
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end
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*/
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/{
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mainboard_vendor = "Artec Group";
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mainboard-name = "DBE61";
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mainboard_pci_subsystem_vendor = "0x1022";
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mainboard_pci_subsystem_device = "0x2323";
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cpus { };
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apic@0 {
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/config/("northbridge/amd/geodelx/apic");
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};
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domain@0 {
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/config/("northbridge/amd/geodelx/domain");
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/* Video RAM has to be in 2MB chunks. */
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/* 16MB for now, as 8MB would not be enough for WinCE */
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geode_video_mb = "16";
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pci@1,0 {
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/config/("northbridge/amd/geodelx/pci");
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};
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pci@15,0 {
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/config/("southbridge/amd/cs5536/dts");
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/* Interrupt enables for LPC bus.
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* Each bit is an IRQ 0-15. */
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lpc_serirq_enable = "0x00001002";
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/* LPC IRQ polarity. Each bit is an IRQ 0-15. */
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lpc_serirq_polarity = "0x0000effd";
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/* 0:continuous 1:quiet */
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lpc_serirq_mode = "1";
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/* GPIO(0-0x20) for INT D:C:B:A, 0xFF=none.
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* See virtual PIC spec. */
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enable_gpio_int_route = "0x0D0C0700";
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/* COM1 settings */
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com1_enable = "0";
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com1_address = "0x2f8";
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com1_irq = "3";
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/* COM2 settings */
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com2_enable = "1";
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com2_address = "0x3f8";
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com2_irq = "4";
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};
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pci@15,2 {
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/config/("southbridge/amd/cs5536/ide");
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};
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};
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};
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