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https://github.com/fail0verflow/switch-coreboot.git
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a46a712610
In the file `COPYING` in the coreboot repository and upstream [1]
just one space is used.
The following command was used to convert all files.
$ git grep -l 'MA 02' | xargs sed -i 's/MA 02/MA 02/'
[1] http://www.gnu.org/licenses/gpl-2.0.txt
Change-Id: Ic956dab2820a9e2ccb7841cab66966ba168f305f
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/2490
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
52 lines
1.4 KiB
Text
52 lines
1.4 KiB
Text
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Advanced Micro Devices, Inc.
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* Copyright (C) 2008-2010 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/* We use ELF as output format. So that we can debug the code in some form. */
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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TARGET(binary)
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SECTIONS
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{
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ROMLOC = CONFIG_BOOTBLOCK_BASE - (CONFIG_BL1_SIZE_KB * 1024);
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/* This section might be better named .setup */
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.rom ROMLOC : {
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_rom = .;
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*(.bl1);
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*(.start);
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*(.id);
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*(.text);
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*(.text.*);
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*(.rom.text);
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*(.rom.data);
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*(.rom.data.*);
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*(.rodata.*);
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_erom = .;
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} = 0xff
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/DISCARD/ : {
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*(.comment)
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*(.note)
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*(.comment.*)
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*(.note.*)
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*(.ARM.*)
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}
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}
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