mirror of
https://github.com/fail0verflow/switch-coreboot.git
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a0c68f864e
* Don't implicitly add __PRE_RAM__ in romcc. Fixes intel/xe7501devkit Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
50 lines
1.4 KiB
C
50 lines
1.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#define ASSEMBLY 1
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#define __PRE_RAM__
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#include <arch/io.h>
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#include "arch/romcc_io.h"
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#include "pc80/mc146818rtc_early.c"
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/**
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* Check whether the normal or the fallback image should be booted
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* (by reading the proper flag from CMOS), and boot it.
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*
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* @param bist The input BIST value.
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* @return The BIST value.
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*/
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static unsigned long main(unsigned long bist)
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{
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if (do_normal_boot())
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goto normal_image;
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else
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goto fallback_image;
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normal_image:
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__asm__ __volatile__("jmp __normal_image" : : "a" (bist) : );
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cpu_reset:
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__asm__ __volatile__("jmp __cpu_reset" : : "a" (bist) : );
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fallback_image:
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return bist;
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}
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