switch-coreboot/southbridge
Ronald G. Minnich efb7c2c4dd Add stage1.h to the files for standard defines used by all stage1 functions.
Modify all functions to use the new v3 pci operations calling conventions. 
use udelay for delays. 

Add the USB debug support function. 
This is compiling pretty well for me save for the missing hypertransport function. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@731 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-08-10 21:20:46 +00:00
..
amd/cs5536 The named unions in the device tree code are obnoxious and degrade 2008-08-10 00:20:24 +00:00
intel/i82371eb The named unions in the device tree code are obnoxious and degrade 2008-08-10 00:20:24 +00:00
nvidia/mcp55 Add stage1.h to the files for standard defines used by all stage1 functions. 2008-08-10 21:20:46 +00:00