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https://github.com/fail0verflow/switch-coreboot.git
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9b4336cf41
- Changes to allow more code to be compiled both ways - Working SMP support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
12 lines
194 B
C
12 lines
194 B
C
#include <cpu/p6/msr.h>
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int boot_cpu(void)
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{
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volatile unsigned long *local_apic;
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unsigned long apic_id;
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int bsp;
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msr_t msr;
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msr = rdmsr(0x1b);
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bsp = !!(msr.lo & (1 << 8));
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return bsp;
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}
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