mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
99b65668f9
Also base the FSP/GOP related bail-out on the correct Kconfig option
to allow adding a VBT along with libgfxinit.
Most things should work, what doesn't is backlight control because
coreboot misses the settings (moved to FSP and need backporting).
Also, Kaby Lake is still unsupported.
TEST=Booted yet to be upstreamed Skylake-S port (Kontron/bSL6) both with
text and linear framebuffer mode and viewed a FILO menu.
Change-Id: I79fbfed7732cf02d054530ea7ec0d34de32836ba
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20113
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
124 lines
3.4 KiB
C
124 lines
3.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Google Inc.
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* Copyright (C) 2015-2017 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <bootmode.h>
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#include <cbmem.h>
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#include <console/console.h>
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#include <device/pci.h>
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#include <drivers/intel/gma/i915_reg.h>
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#include <drivers/intel/gma/libgfxinit.h>
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#include <intelblocks/graphics.h>
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#include <drivers/intel/gma/opregion.h>
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#include <soc/nvs.h>
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#include <soc/ramstage.h>
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uintptr_t fsp_soc_get_igd_bar(void)
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{
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return graphics_get_memory_base();
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}
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void graphics_soc_init(struct device *dev)
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{
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u32 ddi_buf_ctl;
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/*
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* Enable DDI-A (eDP) 4-lane operation if the link is not up yet.
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* This will allow the kernel to use 4-lane eDP links properly
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* if the VBIOS or GOP driver does not execute.
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*/
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ddi_buf_ctl = graphics_gtt_read(DDI_BUF_CTL_A);
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if (!acpi_is_wakeup_s3() && !(ddi_buf_ctl & DDI_BUF_CTL_ENABLE)) {
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ddi_buf_ctl |= DDI_A_4_LANES;
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graphics_gtt_write(DDI_BUF_CTL_A, ddi_buf_ctl);
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}
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/*
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* GFX PEIM module inside FSP binary is taking care of graphics
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* initialization based on RUN_FSP_GOP Kconfig option and input
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* VBT file.
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*
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* In case of non-FSP solution, SoC need to select another
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* Kconfig to perform GFX initialization.
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*/
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if (IS_ENABLED(CONFIG_RUN_FSP_GOP))
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return;
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/* IGD needs to Bus Master */
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u32 reg32 = pci_read_config32(dev, PCI_COMMAND);
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reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
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pci_write_config32(dev, PCI_COMMAND, reg32);
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if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {
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if (!acpi_is_wakeup_s3() && display_init_required()) {
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int lightup_ok;
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gma_gfxinit(&lightup_ok);
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gfx_set_init_done(lightup_ok);
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}
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} else {
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/* Initialize PCI device, load/execute BIOS Option ROM */
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pci_dev_init(dev);
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}
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intel_gma_restore_opregion();
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}
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uintptr_t gma_get_gnvs_aslb(const void *gnvs)
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{
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const global_nvs_t *gnvs_ptr = gnvs;
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return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0);
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}
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void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb)
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{
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global_nvs_t *gnvs_ptr = gnvs;
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if (gnvs_ptr)
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gnvs_ptr->aslb = aslb;
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}
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/* Initialize IGD OpRegion, called from ACPI code */
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static void update_igd_opregion(igd_opregion_t *opregion)
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{
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/* FIXME: Add platform specific mailbox initialization */
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}
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uintptr_t graphics_soc_write_acpi_opregion(struct device *device,
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uintptr_t current, struct acpi_rsdp *rsdp)
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{
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igd_opregion_t *opregion;
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global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
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/* If GOP is not used, exit here */
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if (!IS_ENABLED(CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE))
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return current;
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/* If IGD is disabled, exit here */
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if (pci_read_config16(device, PCI_VENDOR_ID) == 0xFFFF)
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return current;
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printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
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opregion = (igd_opregion_t *)current;
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if (intel_gma_init_igd_opregion(opregion) != CB_SUCCESS)
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return current;
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if (gnvs)
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gnvs->aslb = (u32)(uintptr_t)opregion;
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update_igd_opregion(opregion);
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current += sizeof(igd_opregion_t);
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current = acpi_align_current(current);
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printk(BIOS_DEBUG, "current = %lx\n", current);
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return current;
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}
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