mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
0528863e20
southbridge drivers in Kconfig. * It includes initial superio code as well, but there is at least one error in the pnp_device.c/superio scenario left * Fixed biosemu.c, vm86.c, pnp_device.c (sort of) * Enable vm86 instead of x86emu per default for vga init for now. This makes VGA in qemu work. There might be a bug in x86emu or the compiler I am using. (gcc version 4.1.2 20070115 (prerelease) (SUSE Linux)) * Import isa-dma.c, keyboard.c and i8259.c from v2 /pc80, which was taken from LinuxBIOSv1 released from LANL under release LA-CC Number 00-34 and using parts from the Linux kernel. This patch makes vga and keyboard work in qemu. Yippie Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@260 f3766cd6-281f-0410-b1cd-43a5c92072e9
69 lines
2.2 KiB
C
69 lines
2.2 KiB
C
/*
|
|
* Copyright (C) FIXME
|
|
* Copyright (C) 2007 coresystems GmbH
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
*/
|
|
|
|
#ifndef DEVICE_PNP_H
|
|
#define DEVICE_PNP_H
|
|
|
|
#include <arch/types.h>
|
|
#include <device/device.h>
|
|
#include <device/pnp_def.h>
|
|
|
|
/* Primitive pnp resource manipulation */
|
|
void pnp_write_config(struct device * dev, u8 reg, u8 value);
|
|
u8 pnp_read_config(struct device * dev, u8 reg);
|
|
void pnp_set_logical_device(struct device * dev);
|
|
void pnp_set_enable(struct device * dev, int enable);
|
|
int pnp_read_enable(struct device * dev);
|
|
void pnp_set_iobase(struct device * dev, unsigned index, unsigned iobase);
|
|
void pnp_set_irq(struct device * dev, unsigned index, unsigned irq);
|
|
void pnp_set_drq(struct device * dev, unsigned index, unsigned drq);
|
|
|
|
/* PNP device operations */
|
|
void pnp_read_resources(struct device * dev);
|
|
void pnp_set_resources(struct device * dev);
|
|
void pnp_enable_resources(struct device * dev);
|
|
void pnp_enable(struct device * dev);
|
|
|
|
extern struct device_operations pnp_ops;
|
|
|
|
/* PNP helper operations */
|
|
|
|
struct io_info {
|
|
unsigned mask, set;
|
|
};
|
|
|
|
struct pnp_info {
|
|
struct device_operations *ops;
|
|
unsigned function;
|
|
unsigned flags;
|
|
#define PNP_IO0 0x01
|
|
#define PNP_IO1 0x02
|
|
#define PNP_IO2 0x04
|
|
#define PNP_IO3 0x08
|
|
#define PNP_IRQ0 0x10
|
|
#define PNP_IRQ1 0x20
|
|
#define PNP_DRQ0 0x40
|
|
#define PNP_DRQ1 0x80
|
|
struct io_info io0, io1, io2, io3;
|
|
};
|
|
struct resource *pnp_get_resource(struct device * dev, unsigned index);
|
|
void pnp_enable_devices(struct device *dev, struct device_operations *ops,
|
|
unsigned functions, struct pnp_info *info);
|
|
|
|
#endif /* DEVICE_PNP_H */
|