mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
f2000cd4ad
* fix arch/io.h to use consistent types * add compression code and start integration into Kconfig * update to newer version of Kconfig, and rename some occurences of "Linux" to "LinuxBIOS" * set up Make framework to create linuxbios.rom Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G Minnich <rminnich@lanl.gov> git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@55 f3766cd6-281f-0410-b1cd-43a5c92072e9
151 lines
3.4 KiB
C
151 lines
3.4 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef _ARCH_IO_H
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#define _ARCH_IO_H
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#include <arch/types.h>
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/*
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* This file contains the definitions for the x86 IO instructions
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* inb/inw/inl/outb/outw/outl and the "string versions" of the same
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* (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
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* versions of the single-IO instructions (inb_p/inw_p/..).
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*/
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static inline void outb(u8 value, u16 port)
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{
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__asm__ __volatile__ ("outb %b0, %w1" : : "a" (value), "Nd" (port));
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}
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static inline void outw(u16 value, u16 port)
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{
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__asm__ __volatile__ ("outw %w0, %w1" : : "a" (value), "Nd" (port));
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}
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static inline void outl(u32 value, u16 port)
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{
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__asm__ __volatile__ ("outl %0, %w1" : : "a" (value), "Nd" (port));
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}
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static inline u8 inb(u16 port)
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{
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u8 value;
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__asm__ __volatile__ ("inb %w1, %b0" : "=a"(value) : "Nd" (port));
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return value;
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}
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static inline u16 inw(u16 port)
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{
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u16 value;
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__asm__ __volatile__ ("inw %w1, %w0" : "=a"(value) : "Nd" (port));
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return value;
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}
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static inline u32 inl(u16 port)
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{
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u32 value;
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__asm__ __volatile__ ("inl %w1, %0" : "=a"(value) : "Nd" (port));
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return value;
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}
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static inline void outsb(u16 port, const void *addr, unsigned long count)
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{
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__asm__ __volatile__ (
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"cld ; rep ; outsb "
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: "=S" (addr), "=c" (count)
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: "d"(port), "0"(addr), "1" (count)
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);
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}
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static inline void outsw(u16 port, const void *addr, unsigned long count)
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{
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__asm__ __volatile__ (
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"cld ; rep ; outsw "
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: "=S" (addr), "=c" (count)
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: "d"(port), "0"(addr), "1" (count)
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);
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}
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static inline void outsl(u16 port, const void *addr, unsigned long count)
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{
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__asm__ __volatile__ (
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"cld ; rep ; outsl "
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: "=S" (addr), "=c" (count)
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: "d"(port), "0"(addr), "1" (count)
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);
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}
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static inline void insb(u16 port, void *addr, unsigned long count)
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{
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__asm__ __volatile__ (
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"cld ; rep ; insb "
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: "=D" (addr), "=c" (count)
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: "d"(port), "0"(addr), "1" (count)
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);
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}
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static inline void insw(u16 port, void *addr, unsigned long count)
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{
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__asm__ __volatile__ (
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"cld ; rep ; insw "
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: "=D" (addr), "=c" (count)
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: "d"(port), "0"(addr), "1" (count)
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);
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}
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static inline void insl(u16 port, void *addr, unsigned long count)
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{
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__asm__ __volatile__ (
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"cld ; rep ; insl "
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: "=D" (addr), "=c" (count)
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: "d"(port), "0"(addr), "1" (count)
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);
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}
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static inline void writeb(u8 b, volatile void *addr)
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{
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*(volatile u8 *) addr = b;
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}
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static inline void writew(u16 b, volatile void *addr)
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{
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*(volatile u16 *) addr = b;
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}
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static inline void writel(u32 b, volatile void *addr)
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{
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*(volatile u32 *) addr = b;
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}
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static inline u8 readb(const volatile void *addr)
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{
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return *(volatile u8 *) addr;
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}
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static inline u16 readw(const volatile void *addr)
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{
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return *(volatile u16 *) addr;
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}
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static inline u32 readl(const volatile void *addr)
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{
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return *(volatile u32 *) addr;
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}
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#endif
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