mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
we never used it. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://coreboot.org/repository/coreboot-v3@800 f3766cd6-281f-0410-b1cd-43a5c92072e9
243 lines
5.8 KiB
Text
243 lines
5.8 KiB
Text
##
|
|
## This file is part of the coreboot project.
|
|
##
|
|
## Copyright (C) 2006-2007 coresystems GmbH
|
|
## (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
|
|
##
|
|
## This program is free software; you can redistribute it and/or modify
|
|
## it under the terms of the GNU General Public License as published by
|
|
## the Free Software Foundation; either version 2 of the License, or
|
|
## (at your option) any later version.
|
|
##
|
|
## This program is distributed in the hope that it will be useful,
|
|
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
## GNU General Public License for more details.
|
|
##
|
|
## You should have received a copy of the GNU General Public License
|
|
## along with this program; if not, write to the Free Software
|
|
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
|
##
|
|
|
|
config ARCH_X86
|
|
boolean
|
|
help
|
|
This option is used to set the architecture of a mainboard.
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
config ARCH
|
|
string
|
|
default x86
|
|
depends ARCH_X86
|
|
help
|
|
This is the name of the respective subdirectory in arch/.
|
|
|
|
config CPU_I586
|
|
boolean
|
|
help
|
|
CPU type. At the moment this option selects the reset vector and
|
|
Cache-as-RAM (CAR) implementation for a mainboard. See
|
|
arch/x86/Makefile for more hints on possible values.
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
config CPU_AMD_GEODELX
|
|
boolean
|
|
help
|
|
CPU type. At the moment this option selects the reset vector and
|
|
Cache-as-RAM (CAR) implementation for a mainboard. See
|
|
arch/x86/Makefile for more hints on possible values.
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
config CPU_AMD_K8
|
|
boolean
|
|
help
|
|
CPU type. At the moment this option selects the reset vector and
|
|
Cache-as-RAM (CAR) implementation for a mainboard. See
|
|
arch/x86/Makefile for more hints on possible values.
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
config CONFIG_HPET
|
|
boolean
|
|
depends CPU_AMD_K8
|
|
help
|
|
Whether to configure a High Precision Event Timer. Note that HPETs are
|
|
known to be bug-prone.
|
|
|
|
config K8_REV_F_SUPPORT
|
|
hex
|
|
default 0 if CPU_AMD_K8
|
|
help
|
|
Whether to include rev F support
|
|
|
|
config K8_SCAN_PCI_BUS
|
|
hex
|
|
default 0 if CPU_AMD_K8
|
|
help
|
|
Whether to scan the PCI bus in stage1
|
|
|
|
config K8_ALLOCATE_IO_RANGE
|
|
hex
|
|
default 0 if CPU_AMD_K8
|
|
help
|
|
Whether to allocate IO space in stage1
|
|
|
|
config K8_ALLOCATE_MMIO_RANGE
|
|
hex
|
|
default 0 if CPU_AMD_K8
|
|
help
|
|
Whether to allocate MMIO space in stage1.
|
|
Comment from code:
|
|
Do we need allocate MMIO? Currently we direct
|
|
last 64M to southbridge link (sblink) only,
|
|
We can not lose access to last 4M range to ROM.
|
|
|
|
config LOGICAL_CPUS
|
|
hex
|
|
depends CPU_AMD_K8
|
|
default 1
|
|
help
|
|
How many logical CPUs there are. Fix me.
|
|
|
|
config MAX_PHYSICAL_CPUS
|
|
hex
|
|
depends CPU_AMD_K8
|
|
default 1
|
|
help
|
|
Max number of physical CPUs (sockets)
|
|
|
|
config MAX_PHYSICAL_CPUS_4_BUT_MORE_INSTALLED
|
|
hex
|
|
default 0 if CPU_AMD_K8
|
|
help
|
|
Config with 4 CPUs even if more are installed
|
|
|
|
config CROSS_BAR_47_56
|
|
hex
|
|
default 0 if CPU_AMD_K8
|
|
help
|
|
Configure for the type of crossbar on the mainboard.
|
|
|
|
config OPTION_TABLE
|
|
boolean
|
|
help
|
|
This option is used to determine whether the mainboard has
|
|
a battery backed up real time clock with CMOS NVRAM.
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
config PIRQ_TABLE
|
|
boolean
|
|
help
|
|
This option is used to determine whether the mainboard has
|
|
a PIRQ table, which is the old way to set up interrupt routing.
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
config ACPI_TABLE
|
|
boolean
|
|
help
|
|
This option is used to determine whether the mainboard has
|
|
an ACPI table.
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
config SMP
|
|
boolean
|
|
depends CPU_I586 || CPU_AMD_K8
|
|
default 0
|
|
help
|
|
This option is used to enable certain functions to make
|
|
coreboot work correctly on symmetric multi processor
|
|
systems.
|
|
It is usually set in mainboard/*/Kconfig.
|
|
|
|
config IOAPIC
|
|
boolean
|
|
depends ARCH_X86 && CPU_AMD_K8
|
|
default 0
|
|
help
|
|
If you want to configure an IOAPIC, set this.
|
|
|
|
config CARBASE
|
|
hex
|
|
default 0x8f000 if CPU_I586
|
|
default 0x80000 if CPU_AMD_GEODELX
|
|
default 0xc8000 if CPU_AMD_K8
|
|
help
|
|
This option sets the base address of the area used for CAR.
|
|
|
|
config CARSIZE
|
|
hex
|
|
default 0x1000 if CPU_I586
|
|
default 0x8000 if CPU_AMD_GEODELX
|
|
default 0x8000 if CPU_AMD_K8
|
|
help
|
|
This option sets the size of the area used for CAR.
|
|
|
|
# variables related to AMD Hypertransport.
|
|
config HT_CHAIN_UNITID_BASE
|
|
hex
|
|
default 0 if CPU_AMD_K8
|
|
help
|
|
Hypertransport unit ID base value.
|
|
Mainboard-dependent.
|
|
|
|
config HT_CHAIN_END_UNITID_BASE
|
|
hex
|
|
default 0x20 if CPU_AMD_K8
|
|
help
|
|
Unit id of the end of hypertransport chain
|
|
(usually the real SB); if it is
|
|
less than than HT_CHAIN_UNITID_BASE,
|
|
it can be 0
|
|
|
|
config SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
|
hex
|
|
default 1 if CPU_AMD_K8
|
|
help
|
|
Determines (I don't understand; ask YHLU)
|
|
if only offset SB hypertransport chain
|
|
|
|
config SB_HT_CHAIN_ON_BUS0
|
|
hex
|
|
default 0 if CPU_AMD_K8
|
|
help
|
|
Make SB hypertransport chain sit on bus 0, if it is 1,
|
|
will put sb ht chain on bus 0, if it is 2 will
|
|
put other chain on 0x40, 0x80, 0xc0
|
|
|
|
|
|
config K8_HT_FREQ_1G_SUPPORT
|
|
hex
|
|
default 1 if CPU_AMD_K8
|
|
help
|
|
1 Ghz. support. Opteron E0 or later can support
|
|
1G HT, but still depends on the mainboard
|
|
|
|
config HT_FREQ_800MHZ
|
|
hex
|
|
default 1 if CPU_AMD_K8
|
|
help
|
|
Can we run HT at 800 Mhz
|
|
|
|
config USBDEBUG_DIRECT
|
|
boolean
|
|
depends SOUTHBRIDGE_NVIDIA_MCP55
|
|
default 0
|
|
help
|
|
Determines if we enable USB Direct debugging. If you don't have a dongle,
|
|
this is probably of no value to you.
|
|
|
|
config APIC_ID_OFFSET
|
|
hex "APIC ID offset"
|
|
default 0x10
|
|
depends IOAPIC
|
|
help
|
|
This is entirely mainboard dependent. 0x10 is a *typical* setting but not always a good setting.
|
|
|
|
menu "Debugging"
|
|
|
|
config CARTEST
|
|
bool "Test CAR area"
|
|
default n
|
|
help
|
|
Test the CAR area after it has been set up.
|
|
|
|
endmenu
|