Patrick Rudolph 78c6e3ec42 ddr3: add missing newline ... Add missing newline to SPD CRC verification error message. Verified by testing this code on Intel IvyBridge and Gigabyte GA-B75M-D3H. Change-Id: Id1a0a2329507975c3f66ab884f6e26d99003318e Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: http://review.coreboot.org/10636 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>		2015-06-23 01:50:33 +02:00
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acpi	acpi/sata: add generic sata ssdt port generator	2015-06-07 01:24:47 +02:00
arch	x86: make PCI MMIO CFG functions 64bit proof	2015-06-22 07:34:28 +02:00
console	consoles: remove unused infrastructure	2015-05-26 19:02:54 +02:00
cpu	cpu: x86 port to 64bit	2015-06-20 18:16:54 +02:00
device	ddr3: add missing newline	2015-06-23 01:50:33 +02:00
drivers	lenovo: Hide SMBIOS config	2015-06-11 13:20:56 +02:00
ec	lenovo: Move pc_keyboard_init to h8 init.	2015-05-29 07:45:55 +02:00
include	AMD Merlin Falcon: Add northbridge files for new AMD processor	2015-06-22 22:27:31 +02:00
lib	stage_cache: use cbmem init hooks	2015-06-09 22:06:40 +02:00
mainboard	Move same Kconfigs to northbridge/amd/pi/Kconfig	2015-06-23 01:10:44 +02:00
northbridge	AMD PI agesawrapper: add PSPP (PCIe Speed Power Policy) interface	2015-06-23 01:10:52 +02:00
soc	Remove incorrect Kconfig expressions	2015-06-22 21:22:47 +02:00
southbridge	Remove incorrect Kconfig expressions	2015-06-22 21:22:47 +02:00
superio	superio: use common x86 code on x86-64	2015-06-22 07:36:09 +02:00
vendorcode	vendorcode/amd: unify amdlib for binary pi	2015-06-13 02:07:52 +02:00
Kconfig	Reorder arch & vendorcode in Kconfig	2015-06-21 08:24:55 +02:00