switch-coreboot/src
Kerry She 76d53b22d3 trivial remove blanks at the end of line
Signed-off-by: Kerry She <kerry.she@amd.com>
Acked-by: Kerry She <kerry.she@amd.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6614 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-06-01 02:00:30 +00:00
..
arch/x86 We don't have pausing versions of single-IO instructions. 2011-05-23 22:48:13 +00:00
boot more ifdef -> if fixes. 2011-04-21 21:26:58 +00:00
console Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an 2011-04-26 23:47:04 +00:00
cpu Cosmetic cleanup. 2011-05-15 22:10:15 +00:00
devices more ifdef -> if fixes 2011-04-21 20:45:45 +00:00
drivers Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an 2011-04-26 23:47:04 +00:00
ec Thinkpad: Enable Battery events 2011-04-28 09:29:06 +00:00
include Cosmetic cleanup. 2011-05-15 22:10:15 +00:00
lib Change read_option() to a macro that wraps some API uglyness 2011-05-10 21:53:13 +00:00
mainboard AP_IN_SIPI_WAIT is already defined in the CPU Kconfig of those boards. 2011-05-23 22:43:43 +00:00
northbridge agesa_wrapper: Avoid repetitive Kconfig depends, trivial 2011-05-15 22:40:40 +00:00
pc80 Change read_option() to a macro that wraps some API uglyness 2011-05-10 21:53:13 +00:00
southbridge trivial remove blanks at the end of line 2011-06-01 02:00:30 +00:00
superio some ifdef --> if fixes 2011-04-21 20:24:43 +00:00
vendorcode trivial remove blanks at the end of line 2011-06-01 02:00:30 +00:00
Kconfig Add option 'compress ramstage' 2011-05-02 19:53:04 +00:00
Kconfig.deprecated_options some ifdef --> if fixes 2011-04-21 20:24:43 +00:00