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When used with a U-boot payload it will need this region identity mapped also, so we're defining it in preparation for that functionality. Change-Id: I27cee5b58cb899433b52bd06df07b5f2105212af Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com> Reviewed-on: https://review.coreboot.org/12768 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
31 lines
1.1 KiB
C
31 lines
1.1 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/* This file contains macro definitions for memlayout.ld linker scripts. */
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#ifndef __ARCH_MEMLAYOUT_H
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#define __ARCH_MEMLAYOUT_H
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/* MIPS stacks need 8-byte alignment and stay in one place through ramstage. */
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/* TODO: Double-check that that's the correct alignment for our ABI. */
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#define STACK(addr, size) \
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REGION(stack, addr, size, 8) \
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_ = ASSERT(size >= 2K, "stack should be >= 2K, see toolchain.inc");
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#define DMA_COHERENT(addr, size) REGION(dma_coherent, addr, size, 4K)
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#define SOC_REGISTERS(addr, size) REGION(soc_registers, addr, size, 4)
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#endif /* __ARCH_MEMLAYOUT_H */
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