mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
661a6b476b
With VBOOT_VERIFY_FIRMWARE separated from CHROMEOS, move recovery and developer mode check functions to vboot. Thus, get rid of the BOOTMODE_STRAPS option which controlled these functions under src/lib. BUG=chrome-os-partner:55639 BRANCH=None TEST=None Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15868 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Ia2571026ce8976856add01095cc6be415d2be22e Reviewed-on: https://chromium-review.googlesource.com/364015 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
123 lines
3 KiB
C
123 lines
3 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2012 The Chromium OS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <bootmode.h>
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#include <types.h>
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#include <console/console.h>
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#include <ec/quanta/it8518/ec.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <southbridge/intel/bd82x6x/pch.h>
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#include <elog.h>
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#include "ec.h"
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#ifdef __SMM__
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#include <cpu/x86/smm.h>
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#endif
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#ifndef __SMM__
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void stout_ec_init(void)
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{
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printk(BIOS_DEBUG,"%s: EC FW version %x%x\n", __func__,
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ec_read(EC_FW_VER), ec_read(EC_FW_VER + 1));
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/*
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* Important: get_recovery_mode_switch() must be called in EC init.
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*/
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get_recovery_mode_switch();
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/* Unmute */
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ec_kbc_write_cmd(EC_KBD_CMD_UNMUTE);
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/*
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* Set USB Power off in S3 (enabled in S3 path if requested in gnvs)
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* Bit0 of 0x0D/Bit0 of 0x26
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* 0/0 All USB port off
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* 1/0 USB on, all USB port didn’t support wake up
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* 0/1 USB on, yellow port support wake up charge, but may not support
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* charge smart phone.
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* 1/1 USB on, yellow port in AUTO mode and didn’t support wake up system.
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*/
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ec_write(EC_PERIPH_CNTL_3, ec_read(EC_PERIPH_CNTL_3) & 0xE);
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ec_write(EC_USB_S3_EN, ec_read(EC_USB_S3_EN) & 0xE);
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// TODO: Power Limit Setting
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}
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#else // SMM
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void stout_ec_finalize_smm(void)
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{
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u8 ec_reg, critical_shutdown = 0;
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u32 pm1_cnt;
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/*
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* Check EC for error conditions.
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*/
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/* Fan Error : Peripheral Status 3 (0x35) bit 4 */
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ec_reg = ec_read(EC_PERIPH_STAT_3);
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if (ec_reg & 0x8) {
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printk(BIOS_ERR, " EC Fan Error\n");
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critical_shutdown = 1;
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#if CONFIG_ELOG_GSMI
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elog_add_event_word(EC_EVENT_BATTERY_CRITICAL, EC_EVENT_FAN_ERROR);
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#endif
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}
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/* Thermal Device Error : Peripheral Status 3 (0x35) bit 8 */
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if (ec_reg & 0x80) {
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printk(BIOS_ERR, " EC Thermal Device Error\n");
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critical_shutdown = 1;
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#if CONFIG_ELOG_GSMI
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elog_add_event_word(EC_EVENT_BATTERY_CRITICAL, EC_EVENT_THERMAL);
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#endif
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}
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/* Critical Battery Error */
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ec_reg = ec_read(EC_MBAT_STATUS);
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if ((ec_reg & 0xCF) == 0xC0) {
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printk(BIOS_ERR, " EC Critical Battery Error\n");
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critical_shutdown = 1;
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#if CONFIG_ELOG_GSMI
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elog_add_event_word(ELOG_TYPE_EC_EVENT, EC_EVENT_BATTERY_CRITICAL);
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#endif
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}
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if ((ec_reg & 0x8F) == 0x8F) {
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printk(BIOS_ERR, " EC Read Battery Error\n");
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#if CONFIG_ELOG_GSMI
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elog_add_event_word(ELOG_TYPE_EC_EVENT, EC_EVENT_BATTERY);
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#endif
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}
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if (critical_shutdown) {
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printk(BIOS_ERR, "EC critical_shutdown");
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/* Go to S5 */
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pm1_cnt = inl(smm_get_pmbase() + PM1_CNT);
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pm1_cnt |= (0xf << 10);
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outl(pm1_cnt, smm_get_pmbase() + PM1_CNT);
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}
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}
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#endif //__SMM__
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