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https://github.com/fail0verflow/switch-coreboot.git
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62a5027ee1
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://coreboot.org/repository/LinuxBIOSv3@270 f3766cd6-281f-0410-b1cd-43a5c92072e9
60 lines
1.5 KiB
Text
60 lines
1.5 KiB
Text
/*
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/{
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config = "mainboard,emulation,qemu-x86";
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enabled;
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cpus {
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enabled;
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};
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domain0 {
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enabled;
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config = "northbridge,intel,i440bxemulation";
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ops = "i440bxemulation_pcidomainops";
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pcidomain = "0";
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device0,0 {
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enabled;
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pcipath = "0,0";
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};
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/* southbridge,intel,piix4{
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pcipath = "0,0";
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enabled;
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};
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*/
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};
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};
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%%
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#include <southbridge/intel/i82371eb/config.h>
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extern struct constructor qemuvga_constructors[];
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struct mainboard_emulation_qemu_x86_config root = {
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.nothing = 1,
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};
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struct northbridge_intel_i440bx_config domain0 = {
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.ramsize = CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION_RAMSIZE,
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};
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struct constructor *all_constructors[] = {
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i440bx_constructors, i82371eb_constructors, qemuvga_constructors, 0
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};
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