mirror of
https://github.com/fail0verflow/switch-coreboot.git
synced 2025-05-04 01:39:18 -04:00
48dbc663d7
Move drivers/storage into commonlib/storage to enable access by libpayload and indirectly by payloads. * Remove SD/MMC specific include files from include/device * Remove files from drivers/storage * Add SD/MMC specific include files to commonlib/include * Add files to commonlib/storage * Fix header file references * Add subdir entry in commonlib/Makefile.inc to build the SD/MMC driver * Add Kconfig source for commonlib/storage * Rename *DEVICE* to *COMMONLIB* * Rename *DRIVERS_STORAGE* to *COMMONLIB_STORAGE* TEST=Build and run on Galileo Gen2 Change-Id: I4339e4378491db9a0da1f2dc34e1906a5ba31ad6 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/19672 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
107 lines
2.9 KiB
Makefile
107 lines
2.9 KiB
Makefile
#
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# This file is part of the coreboot project.
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#
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# Copyright (C) 2017 Intel Corporation.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; version 2 of the License.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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ifeq ($(CONFIG_COMMONLIB_STORAGE),y)
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bootblock-y += sd_mmc.c
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bootblock-y += storage.c
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verstage-y += sd_mmc.c
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verstage-y += storage.c
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romstage-y += sd_mmc.c
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romstage-y += storage.c
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postcar-y += sd_mmc.c
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postcar-y += storage.c
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ramstage-y += sd_mmc.c
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ramstage-y += storage.c
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# Determine the type of controller being used
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ifeq ($(CONFIG_SDHCI_CONTROLLER),y)
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bootblock-y += pci_sdhci.c
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bootblock-y += sdhci.c
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bootblock-$(CONFIG_SDHCI_ADMA_IN_BOOTBLOCK) += sdhci_adma.c
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bootblock-y += sdhci_display.c
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verstage-y += pci_sdhci.c
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verstage-y += sdhci.c
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verstage-$(CONFIG_SDHCI_ADMA_IN_VERSTAGE) += sdhci_adma.c
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verstage-y += sdhci_display.c
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romstage-y += pci_sdhci.c
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romstage-y += sdhci.c
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romstage-$(CONFIG_SDHCI_ADMA_IN_ROMSTAGE) += sdhci_adma.c
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romstage-y += sdhci_display.c
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postcar-y += pci_sdhci.c
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postcar-y += sdhci.c
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postcar-y += sdhci_adma.c
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postcar-y += sdhci_display.c
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ramstage-y += pci_sdhci.c
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ramstage-y += sdhci.c
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ramstage-y += sdhci_adma.c
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ramstage-y += sdhci_display.c
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# Determine if the bounce buffer is necessary
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ifeq ($(CONFIG_SDHCI_BOUNCE_BUFFER),y)
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bootblock-y += bouncebuf.c
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verstage-y += bouncebuf.c
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romstage-y += bouncebuf.c
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postcar-y += bouncebuf.c
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ramstage-y += bouncebuf.c
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endif # CONFIG_SDHCI_BOUNCE_BUFFER
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endif # CONFIG_SDHCI_CONTROLLER
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# Determine if MultiMediaCards or embedded MMC devices are supported
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ifeq ($(CONFIG_COMMONLIB_STORAGE_MMC),y)
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bootblock-y += mmc.c
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verstage-y += mmc.c
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romstage-y += mmc.c
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postcar-y += mmc.c
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ramstage-y += mmc.c
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endif # CONFIG_COMMONLIB_STORAGE_MMC
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# Determine if Secure Digital cards are supported
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ifeq ($(CONFIG_COMMONLIB_STORAGE_SD),y)
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bootblock-y += sd.c
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verstage-y += sd.c
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romstage-y += sd.c
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postcar-y += sd.c
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ramstage-y += sd.c
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endif # CONFIG_COMMONLIB_STORAGE_SD
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# Determine if erase operations are supported
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ifeq ($(CONFIG_STORAGE_ERASE),y)
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bootblock-$(CONFIG_STORAGE_EARLY_ERASE) += storage_erase.c
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verstage-$(CONFIG_STORAGE_EARLY_ERASE) += storage_erase.c
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romstage-y += storage_erase.c
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postcar-y += storage_erase.c
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ramstage-y += storage_erase.c
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endif # CONFIG_STORAGE_ERASE
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# Determine if write operations are supported
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ifeq ($(CONFIG_STORAGE_WRITE),y)
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bootblock-$(CONFIG_STORAGE_EARLY_WRITE) += storage_write.c
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verstage-$(CONFIG_STORAGE_EARLY_WRITE) += storage_write.c
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romstage-y += storage_write.c
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postcar-y += storage_write.c
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ramstage-y += storage_write.c
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endif # CONFIG_STORAGE_WRITE
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endif # CONFIG_COMMONLIB_STORAGE
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