mirror of
https://github.com/fail0verflow/switch-coreboot.git
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58647909d1
BUG=None BRANCH=None TEST=None Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16304 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Change-Id: I53208ce5db06d2c65f954e6d59222924ab87722e Reviewed-on: https://chromium-review.googlesource.com/380991 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
115 lines
2.9 KiB
C
115 lines
2.9 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2008 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <spd.h>
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#include <lib.h>
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#include <arch/io.h>
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#include <device/pci_def.h>
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#include <console/console.h>
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#include "i945.h"
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void print_pci_devices(void)
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{
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device_t dev;
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for (dev = PCI_DEV(0, 0, 0);
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dev <= PCI_DEV(0, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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uint32_t id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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printk(BIOS_DEBUG, "PCI: %02x:%02x.%02x", (dev >> 20) & 0xff,
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(dev >> 15) & 0x1f, (dev >> 12) & 7);
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printk(BIOS_DEBUG, " [%04x:%04x]\n", id &0xffff, id >> 16);
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}
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}
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void dump_pci_device(unsigned dev)
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{
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int i;
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printk(BIOS_DEBUG, "PCI: %02x:%02x.%02x\n", (dev >> 20) & 0xff, (dev >> 15) & 0x1f, (dev >> 12) & 7);
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for (i = 0; i <= 255; i++) {
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unsigned char val;
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if ((i & 0x0f) == 0) {
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printk(BIOS_DEBUG, "%02x:", i);
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}
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val = pci_read_config8(dev, i);
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printk(BIOS_DEBUG, " %02x", val);
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if ((i & 0x0f) == 0x0f) {
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printk(BIOS_DEBUG, "\n");
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}
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}
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}
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void dump_pci_devices(void)
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{
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device_t dev;
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for (dev = PCI_DEV(0, 0, 0);
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dev <= PCI_DEV(0, 0x1f, 0x7);
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dev += PCI_DEV(0,0,1)) {
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uint32_t id;
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id = pci_read_config32(dev, PCI_VENDOR_ID);
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if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0xffff) ||
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(((id >> 16) & 0xffff) == 0x0000)) {
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continue;
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}
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dump_pci_device(dev);
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}
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}
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void dump_spd_registers(void)
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{
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unsigned device;
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device = DIMM0;
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while (device <= DIMM3) {
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int status = 0;
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int i;
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printk(BIOS_DEBUG, "\ndimm %02x", device);
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for (i = 0; (i < 256) ; i++) {
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if ((i % 16) == 0) {
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printk(BIOS_DEBUG, "\n%02x: ", i);
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}
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status = smbus_read_byte(device, i);
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if (status < 0) {
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printk(BIOS_DEBUG, "bad device: %02x\n", -status);
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break;
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}
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printk(BIOS_DEBUG, "%02x ", status);
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}
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device++;
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printk(BIOS_DEBUG, "\n");
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}
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}
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void dump_mem(unsigned start, unsigned end)
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{
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unsigned i;
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printk(BIOS_DEBUG, "dump_mem:");
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for (i=start;i<end;i++) {
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if ((i & 0xf)==0) {
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printk(BIOS_DEBUG, "\n%08x:", i);
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}
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printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
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}
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printk(BIOS_DEBUG, "\n");
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}
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