Ronald G. Minnich 575ca7374c This change moves the geodelxinit code from stage2 to stage1, which in ... turn gets cache turned on much sooner. The system boots a bit faster. We're still far too slow, perhaps because we are not caching ROM? Index: arch/x86/Makefile Add ../../northbridge/amd/geodelx/geodelxinit.o object Index: arch/x86/geodelx/geodelxinit.c add sizeram function. Index: arch/x86/geodelx/stage1.c add called to northbridge_init_early() Index: northbridge/amd/geodelx/Makefile remove geodelxinit.o object Index: northbridge/amd/geodelx/geodelx.c remove call to northbridge_init_early() remove sizeram function. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://coreboot.org/repository/coreboot-v3@572 f3766cd6-281f-0410-b1cd-43a5c92072e9		2008-02-04 16:16:16 +00:00
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x86	This change moves the geodelxinit code from stage2 to stage1, which in	2008-02-04 16:16:16 +00:00