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This removes the newlines from all files found by the new int-015-final-newlines script. Change-Id: I65b6d5b403fe3fa30b7ac11958cc0f9880704ed7 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/15975 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
237 lines
4.7 KiB
Text
237 lines
4.7 KiB
Text
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2014 Google Inc.
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* Copyright (C) 2015 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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// Intel SMBus Controller 0:1f.3
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Device (SBUS)
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{
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Name (_ADR, 0x001f0004)
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#ifdef ENABLE_SMBUS_METHODS
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OperationRegion (SMBP, PCI_Config, 0x00, 0x100)
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Field(SMBP, DWordAcc, NoLock, Preserve)
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{
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Offset(0x40),
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, 2,
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I2CE, 1
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}
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OperationRegion (SMBI, SystemIO, SMBUS_IO_BASE, 0x20)
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Field (SMBI, ByteAcc, NoLock, Preserve)
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{
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HSTS, 8, // Host Status
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, 8,
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HCNT, 8, // Host Control
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HCMD, 8, // Host Command
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TXSA, 8, // Transmit Slave Address
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DAT0, 8, // Host Data 0
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DAT1, 8, // Host Data 1
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HBDB, 8, // Host Block Data Byte
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PECK, 8, // Packet Error Check
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RXSA, 8, // Receive Slave Address
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RXDA, 16, // Receive Slave Data
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AUXS, 8, // Auxiliary Status
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AUXC, 8, // Auxiliary Control
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SLPC, 8, // SMLink Pin Control
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SBPC, 8, // SMBus Pin Control
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SSTS, 8, // Slave Status
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SCMD, 8, // Slave Command
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NADR, 8, // Notify Device Address
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NDLB, 8, // Notify Data Low Byte
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NDLH, 8, // Notify Data High Byte
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}
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// Kill all SMBus communication
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Method (KILL, 0, Serialized)
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{
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Or (HCNT, 0x02, HCNT) // Send Kill
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Or (HSTS, 0xff, HSTS) // Clean Status
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}
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// Check if last operation completed
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// return Failure = 0, Success = 1
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Method (CMPL, 0, Serialized)
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{
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Store (4000, Local0) // Timeout 200ms in 50us steps
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While (Local0) {
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If (And(HSTS, 0x02)) { // Completion Status?
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Return (1) // Operation Completed
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} Else {
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Stall (50)
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Decrement (Local0)
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If (LEqual(Local0, 0)) {
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KILL()
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}
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}
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}
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Return (0) // Failure
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}
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// Wait for SMBus to become ready
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Method (SRDY, 0, Serialized)
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{
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Store (200, Local0) // Timeout 200ms
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While (Local0) {
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If (And(HSTS, 0x40)) { // IN_USE?
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Sleep(1) // Wait 1ms
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Decrement(Local0) // timeout--
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If (LEqual(Local0, 0)) {
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Return (1)
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}
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} Else {
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Store (0, Local0) // We're ready
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}
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}
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Store (4000, Local0) // Timeout 200ms (50us * 4000)
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While (Local0) {
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If (And (HSTS, 0x01)) { // Host Busy?
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Stall(50) // Wait 50us
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Decrement(Local0) // timeout--
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If (LEqual(Local0, 0)) {
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KILL()
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}
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} Else {
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Return (0) // Success
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}
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}
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Return (1) // Failure
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}
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// SMBus Send Byte
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// Arg0: Address
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// Arg1: Data
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// Return: 1 = Success, 0=Failure
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Method (SSXB, 2, Serialized)
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{
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// Is the SMBus Controller Ready?
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If (SRDY()) {
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Return (0)
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}
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// Send Byte
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Store (0, I2CE) // SMBus Enable
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Store (0xbf, HSTS)
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Store (Arg0, TXSA) // Write Address
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Store (Arg1, HCMD) // Write Data
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Store (0x48, HCNT) // Start + Byte Data Protocol
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If (CMPL()) {
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Or (HSTS, 0xff, HSTS) // Clean up
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Return (1) // Success
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}
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Return (0)
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}
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// SMBus Receive Byte
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// Arg0: Address
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// Return: 0xffff = Failure, Data (8bit) = Success
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Method (SRXB, 2, Serialized)
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{
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// Is the SMBus Controller Ready?
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If (SRDY()) {
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Return (0xffff)
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}
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// Receive Byte
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Store (0, I2CE) // SMBus Enable
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Store (0xbf, HSTS)
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Store (Or (Arg0, 1), TXSA) // Write Address
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Store (0x44, HCNT) // Start
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If (CMPL()) {
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Or (HSTS, 0xff, HSTS) // Clean up
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Return (DAT0) // Success
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}
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Return (0xffff)
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}
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// SMBus Write Byte
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// Arg0: Address
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// Arg1: Command
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// Arg2: Data
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// Return: 1 = Success, 0=Failure
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Method (SWRB, 3, Serialized)
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{
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// Is the SMBus Controller Ready?
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If (SRDY()) {
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Return (0)
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}
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// Send Byte
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Store (0, I2CE) // SMBus Enable
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Store (0xbf, HSTS)
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Store (Arg0, TXSA) // Write Address
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Store (Arg1, HCMD) // Write Command
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Store (Arg2, DAT0) // Write Data
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Store (0x48, HCNT) // Start + Byte Protocol
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If (CMPL()) {
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Or (HSTS, 0xff, HSTS) // Clean up
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Return (1) // Success
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}
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Return (0)
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}
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// SMBus Read Byte
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// Arg0: Address
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// Arg1: Command
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// Return: 0xffff = Failure, Data (8bit) = Success
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Method (SRDB, 2, Serialized)
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{
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// Is the SMBus Controller Ready?
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If (SRDY()) {
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Return (0xffff)
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}
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// Receive Byte
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Store (0, I2CE) // SMBus Enable
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Store (0xbf, HSTS)
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Store (Or (Arg0, 1), TXSA) // Write Address
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Store (Arg1, HCMD) // Command
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Store (0x48, HCNT) // Start
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If (CMPL()) {
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Or (HSTS, 0xff, HSTS) // Clean up
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Return (DAT0) // Success
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}
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Return (0xffff)
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}
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#endif
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}
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